Mobile time-keeping applications require small form-factor, tight frequency stability, and micro-power 32.768kHz clock references. Today's 32kHz quartz resonators and oscillators are facing challenges in size reduction [1,2]. Previously described MEMS-based oscillators can achieve tight accuracy but operate at high frequency with power unsuitable for mobile applications [3]. This paper introduces a 32kHz MEMS-based oscillator. Based on a comparison table of recent oscillators shown in Fig. 12.9.6, it offers the smallest size, 1.55×0.85mm 2 , with the best frequency stability, 100ppm (XO) and 3ppm (TCXO) over the industrial temperature range of -40 to 85°C. Supply current is 0.9 and 1.0μA for XO and TCXO, respectively, at supply voltages from 1.5 to 3.6V.A simplified block diagram of the MEMS-based oscillator is shown in Fig. 12.9.1. A 524kHz MEMS resonator and sustaining amplifier provide a frequency reference to a programmable fractional-N synthesizer, which in turn generates an accurate 32kHz output. The oscillator can be configured in either XO or TCXO mode. In XO mode, the fractional-N synthesizer compensates for the frequency inaccuracy due to process variations through a 2 nd -order digital Delta-Sigma Modulator (DSM). In TCXO mode, a temperature-to-digital converter (TDC) and a 3 rd -order polynomial additionally compensate frequency variation over temperature.The capacitively transduced 524kHz MEMS resonator, shown in Fig. 12.9.2, has the following electrical characteristics: nominal quality factor (Q) of 52,000, nominal motional impedance (R m ) of 40kΩ, and resonant frequency variation of <100ppm over -40 to +85°C. The resonator is biased using a Charge Pump (CP) that triples a 1.2V regulated supply. A Pierce sustaining circuit maintains oscillation with a sub-threshold inverter. An Automatic Gain Control (AGC) [1] adjusts the g m of this inverter at start up and over PVT variations. A series drive capacitor (C Drive ) is trimmed to compensate R m variation over production. The total current consumption of the MEMS sustaining circuit and the CP is 240nA. Figure 12.9.3 shows the block diagram of the PLL and temperaturecompensation path. The MEMS frequency is divided down to 32kHz by DSM controlled pre-divider. The PLL bandwidth is set to 1kHz to minimize the noise contribution from the pre-divider and the VCO. The VCO is a current-controlled ring oscillator with a nominal frequency of 262kHz. The current consumption of the PLL, including DSM, is 290nA.In low-power mode, shown in Fig. 12.9.3, the PLL can be disabled and the output derived from the DSM controlled pre-divider. This introduces additional output jitter, but is not detrimental in applications that count pulses, e.g., 32,768 pulses to define one second. This low power XO mode (LPM) reduces chip current to 0.6μA for 1Hz rail-to-rail output clock with no external load.The TDC shown in Fig. 12.9.3 employs a BJT-based temperature-sensing element [4]. This produces a PTAT voltage ΔV BE =V BE2 -V BE1, using two equally sized BJTs biased with differen...