The Aspect Ratio Trapping technique has been extensively evaluated for improving the quality of III-V heteroepitaxial films grown on Si, due to the potential for terminating defects at the sidewalls of SiO2 patterned trenches that enclose the growth region. However, defects propagating along the trench direction cannot be effectively confined with this technique. We studied the effect of the trench bottom geometry on the density of defects of GaAs fins, grown by metal-organic chemical vapor deposition on 300 mm Si (001) wafers inside narrow (<90 nm wide) trenches. Plan view and cross sectional Scanning Electron Microscopy and Transmission Electron Microscopy, together with High Resolution X-Ray Diffraction, were used to evaluate the crystal quality of GaAs. The prevalent defects that reach the top surface of GaAs fins are {111} twin planes propagating along the trench direction. The lowest density of twin planes, ∼8 × 108 cm−2, was achieved on “V” shaped bottom trenches, where GaAs nucleation occurs only on {111} Si planes, minimizing the interfacial energy and preventing the formation of antiphase boundaries.
We report the effects of lanthanum doping/alloying on antiferroelectric (AFE) properties of ZrO2. Starting with pure ZrO2, an increase in La doping leads to the narrowing of the AFE double hysteresis loops and an increase in the critical voltage/electric field for AFE → ferroelectric transition. At higher La contents, the polarization-voltage characteristics of doped/alloyed ZrO2 resemble that of a non-linear dielectric without any discernible AFE-type hysteresis. X-ray diffraction based analysis indicates that the increased La content while preserving the non-polar, parent AFE, tetragonal P42/nmc phase leads to a decrease in tetragonality and the (nano-)crystallite size and an increase in the unit cell volume. Furthermore, antiferroelectric behavior is obtained in the as-deposited thin films without requiring any capping metallic layers and post-deposition/-metallization anneals due to which our specific atomic layer deposition system configuration crystallizes and stabilizes the AFE tetragonal phase during growth.
III-V semiconductors have emerged as the leading candidate to replace Si as the n-FET channel material for future low power logic applications. However, to realize the full performance benefits of III-V channels, it is crucial that external parasitic resistance (R ext ) be minimized. Among the different components of R ext , contact resistance (R C ), between metal and source/drain (S/D) junctions, has become the critical focus. Historically, multi-layered Au-based contacts (e.g. Au/Ge/III-V) are used in III-V processing to lower R C .However, the renewed interest in III-V semiconductors has attracted an increasing interest in developing Au-free contacts to III-V with low R C . In addition, a "silicide-like" metal contact process for III-V was recently developed by reacting Ni with InGaAs to form Ni-InGaAs. This is significant as it enables self-alignment and offers the option of using a common
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