An ultra-low-power MicroController Unit System-on-Chip (MCU SOC) is described with integrated DC to DC power management and Adaptive Dynamic Voltage Control (ADVC) mechanism. The SOC, designed and fabricated in a 40 nm ULP standard CMOS technology, includes the complete Synopsys ARC EM5D core MCU, featuring a full set of DSP instructions and minimizing energy consumption at a wide range of frequencies: 312 K-80 MHz. A number of unique low voltage digital libraries, comprising of approximately 300 logic cells and sequential elements, were used for the MCU SOC design. On-die silicon sensors were utilized to continuously change the operating voltage to optimize power/performance for a given frequency and environmental conditions, and also to resolve yield and life time problems, while operating at low voltages. A First Fail (FFail) mechanism, which can be digitally and linearly controlled with up to 8 bits, detects the failing SOC voltage at a given frequency. The core operates between 0.45-1.1 V volts with a direct battery connection for an input voltage of 1.6-3.6 V. Measurement results show that the peak energy efficiency is 18µW/MHz. A comparison to state-of-the-art commercial SOCs is presented, showing a 3-5× improved current/DMIPS (Dhrystone Million Instructions per second) compared to the next best chip. efficient) Systems on a Chips (SoC) that can support both minimum energy operation, and also reliably adapt their operating voltage to different environmental conditions is very challenging.Unfortunately, conventional SoCs, using supply voltages in the range of 0.9-1.8 V, are not suitable for IoT applications. In these SoCs, the "on" transistors operate in "super-threshold" region, far above the switching threshold of a transistor. In this region, the "Ion" current of a transistor is very strong, which results in a ratio of many orders of magnitude between the "Ion" and the "Ioff" (parasitic leakage) currents. This results in a very fast and reliable, albeit power hungry operation.Low voltage operation in the "sub-threshold" or "near-threshold" regions have been found to be advantageous in dramatically reducing energy dissipation [16,18,19]. However, the power supply reduction is accompanied by a number of problems and significant challenges, especially in mass production designs [22][23][24][25][26]. The low voltage associated with frequency reduction is not suitable for all modes of operation, and an adaptive voltage control mechanism is required. Lower supply voltages also mean lower noise margins, reduced yield, and increased vulnerability to process variations and temperature fluctuations [27][28][29][30][31][32]. The characteristics of semiconductor behavior in sub/near-threshold are not well represented by standard transistor models and are different from those in the super-threshold region, resulting in different sizing and ratio optimizations.The subthreshold current is exponentially dependent on the transistor's threshold voltage. Hence, process variations that substantially affect the threshold vol...