0.5‐V bulk‐driven OTA and its applications

Self Cite

Summary A simple realization of a 0.5 V bulk‐driven voltage follower/direct current (DC) level shifter designed in a 0.18 µm CMOS technology is presented in the paper. The circuit is characterized by large input and output voltage swings and a DC voltage gain close to unity. The DC voltage shift between input and output terminals can be regulated in a certain interval around zero, by means of biasing current sinks. An application of the proposed voltage follower circuit for realization of a low‐voltage class AB output stage has also been described in the paper. Finally, the operational amplifier exploiting the proposed output stage has been presented and evaluated in detail. Copyright © 2014 John Wiley & Sons, Ltd.

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A 0.5 V bulk‐driven voltage follower/DC level shifter and its application in class AB output stage

Kulej

Blakiewicz

2014

Self Cite

“…Many linearization techniques of MOS pair transconductor have been described in the literature . It is therefore virtually impossible to compare the solution shown in Figure to all other known circuits.…”

Section: Linearization Methodsmentioning

confidence: 99%

Multiple output differential OTA with linearizing bulk‐driven active‐error feedback loop for continuous‐time filter applications

Szczepański

Pankiewicz

Koziel

et al. 2014

SUMMARYA CMOS circuit realization of a highly linear multiple-output differential operational transconductance amplifier (OTA) has been proposed. The presented approach exploits a differential pair as an input stage with both the gate and the bulk terminals as signal ports. For the proposed OTA, improved linearity is obtained by means of the active-error feedback loop operating at the bulk terminals of the input stage. SPICE simulations of the OTA show that, for 0.35 μm AMS process, total harmonic distortion at 1.36Vpp is less than 1% with dynamic range equal to 60.1 dB at power consumption of 276 μW from 3.3 V supply. As an example, both single output and dual differential OTAs are used to design third-order elliptic low-pass filters. The cut-off frequency of the filters is 1 MHz. The power consumption of the OTA-C filter utilizing the dual output differential OTA is reduced to 1.24 mW in comparison to 2.2 mW consumed by the single output differential OTA-C filter counterpart.

“…Most of them are bulk-driven (BD) circuits based on injecting input signals through the bulk terminal while connecting the gate to a supply rail [1][2][3][4][5][6][7] . For analog circuits based on op-amps, this can be achieved by keeping both amplifier input terminals close to a supply rail.…”

Section: Introductionmentioning

confidence: 99%

±0.18‐V supply voltage gate‐driven PGA with 0.7‐Hz to 2‐kHz constant bandwidth and 0.15‐μW power dissipation

Pourashraf

Ramírez-Angulo

López-Martín

et al. 2017

A simple gate-driven scheme to reduce the minimum supply voltage of AC coupled amplifiers by close to a factor of two is introduced. The inclusion of a floating battery in the feedback loop allows both input terminals of the op-amp to operate very close to a supply rail. This reduces essentially supply requirements. The scheme is verified experimentally with the example of a PGA that operates with ±0.18-V supply voltages in 0.18-μm CMOS technology and a power dissipation of about 0.15 μW. It has a 4-bit digitally programmable gain and 0.7-Hz to 2-kHz true constant bandwidth that is independent on gain with a 25-pF load capacitor. In addition, simulations of the same circuit in 0.13-μm CMOS technology show that the proposed scheme allows operation with ±0.08-V supplies, 7.5-Hz to 8-kHz true constant bandwidth with a 25-pF load capacitor, and a total power dissipation of 0.07 μW. KEYWORDS floating battery, low voltage amplifier, nanowatt power consumption, programmable gain amplifier, true constant bandwidth | INTRODUCTIONA crucial aspect to reduce the power dissipation of analog and digital integrated systems is the reduction of their minimum supply requirements. For analog circuits based on op-amps, this can be achieved by keeping both amplifier input terminals close to a supply rail. Several papers have reported systems operating from supplies as low as 0.5 V (some without experimental verification). Most of them are bulk-driven (BD) circuits based on injecting input signals through the bulk terminal while connecting the gate to a supply rail 1-7 . The main disadvantage of the BD technique is that bulk transconductance is usually a factor 4-5 lower than the gate transconductance. This leads to essential gain bandwidth degradation, higher input noise, higher offset, etc. Also, input leakage currents (required to be supplied by the signal sources) can become comparable to the bias currents even for moderate input signal swings that weakly turn on the bulk PN junction. Additionally bulk driven circuits suffer from large bulk parasitic capacitances that results in large input capacitance. Other non-body driven (gate-driven (GD)) low voltage approaches use relatively large valued DC current sources to maintain both inputs of the op-amp close to a supply rail. The DC current sources are implemented with relatively low valued resistors. They increase essentially quiescent power dissipation and can also lead to a large output offset voltage and bandwidth degradation 7 . In this paper, we introduce a very simple technique to implement GD AC coupled amplifiers that can operate with ±0.18-V dual supply voltages V supply in 0.18-μm CMOS technology and ±0.08 V in 0.13-μm CMOS technology.