2021 IEEE Asian Solid-State Circuits Conference (A-Sscc) 2021
DOI: 10.1109/a-sscc53895.2021.9634748
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1.55mW 2GHz ERBW 7b 800MS/s 3-stage Pipelined SAR ADC in 28nm CMOS using a Kickback-Cancelling 7T-Dynamic Residue Amplifier with only 16fF Input Capacitance

Hyeonsik Kim
1
,
Seonkyung Kim
2
,
Jintae Kim
3
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