1-V Inverting and Non-inverting Loser-Take-All Circuit and Its Applications

Khateb, Fabian; Kumngern, Montree; Kulej, Tomasz

doi:10.1007/s00034-015-0130-5

Cited by 3 publications

(2 citation statements)

References 29 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The experimental results of the proposed BD-QFG-DDCC circuit are presented in detail in [18]. Several interesting applications based on this active element are presented in [19][20][21][22][23]. It is worth noting that the BD-QFG-DDCC was proposed to serve in low frequency applications such as the biomedical ones where the frequency range of the biosignals is in sub-hertz up to 10 kHz.…”

Section: Introductionmentioning

confidence: 99%

Shadow filters based on DDCC

Khateb

Jaikla

Kulej³

et al. 2017

IET Circuits, Devices & Syst

Self Cite

View full text Add to dashboard Cite

This study presents a new realisation of voltage-mode shadow filters based on low-voltage low-power differential difference current conveyor (DDCC). Thanks to the attractive features of the DDCC, including its capability of performing arithmetic operations, the proposed filters offer the advantage of circuit simplicity, minimum number of active and passive elements, and no need for additional summing circuit, compared to the previous available shadow filter designs. The DDCC was designed and fabricated in Cadence platform using 0.35 μm CMOS AMIS process with supply voltage and power consumption of 1 V and 37 µW, respectively. The presented simulation and experimental results using a real chip validate the functionality of the proposed filters.

show abstract

Section: Introductionmentioning

confidence: 99%

Shadow filters based on DDCC

Khateb

Jaikla

Kulej³

et al. 2017

IET Circuits, Devices & Syst

Self Cite

View full text Add to dashboard Cite

show abstract

“…In CMOS technology, due to the high value of the threshold voltage, reducing the voltage supply significantly limits the headroom of circuit operation. Therefore, innovative design techniques such as bulk‐driven, floating‐gate, quasi‐floating‐gate and their combination have been adopted to overcome the high value of the threshold voltage, to increase the input common mode range and to maintain other circuit's performance acceptable [5–34].…”

Section: Introductionmentioning

confidence: 99%

Low‐voltage fully differential difference transconductance amplifier

Khateb¹,

Kumngern

Kulej³

et al. 2017

IET Circuits, Devices & Systems

Self Cite

View full text Add to dashboard Cite

A new complementary metal-oxide-semiconductor (CMOS) structure for fully differential difference transconductance amplifier (FDDTA) is presented in this study. Thanks to using the non-conventional quasi-floating-gate (QFG) technique the circuit is capable to work under low-voltage supply of 0.6 V with extended input voltage range and with class AB output stages. The QFG multiple-input metal-oxide-semiconductor transistor is used to reduce the count of the differential pairs that needed to realise the FDDTA with simple CMOS structure. The static power consumption of the proposed FDDTA is 40 µW. The FDDTA was designed in Cadence platform using 0.18 µm CMOS technology from Taiwan Semiconductor Manufacturing Company (TSMC). As an example of applications a three-stage quadrature oscillator and fifth-order elliptic low-pass filter are presented to confirm the attractive features of the proposed CMOS structure of the FDDTA.

show abstract