10.5 A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET

Baek, Seung-Yeob; Jang, Il-Hoon; Choi, Michael; Roh, Hyungdong; Lim, Woongtaek; Cho, Young-Jae; Shin, Jongshin

doi:10.1109/isscc42613.2021.9366051

Cited by 9 publications

(2 citation statements)

References 4 publications

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“…19. Noise-shaping (NS) technique is also added in Pipe-SAR ADC [176] , where a single residue amplifier involves all pipelining, loop filtering and summing operations to save power. This solution provides an additional error shaping on the noise of the 2nd stage quantization, thus potentially leading to a higher resolution or a better energy efficiency.…”

Section: Pipeline Hybrid Adcsmentioning

confidence: 99%

Trending IC design directions in 2022

Chan¹,

Cheng²,

Deng³

et al. 2022

J. Semicond.

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For the non-stop demands for a better and smarter society, the number of electronic devices keeps increasing exponentially; and the computation power, communication data rate, smart sensing capability and intelligence are always not enough. Hardware supports software, while the integrated circuit (IC) is the core of hardware. In this long review paper, we summarize and discuss recent trending IC design directions and challenges, and try to give the readers big/cool pictures on each selected small/hot topics. We divide the trends into the following six categories, namely, 1) machine learning and artificial intelligence (AI) chips, 2) communication ICs, 3) data converters, 4) power converters, 5) imagers and range sensors, 6) emerging directions. Hope you find this paper useful for your future research and works.

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Section: Pipeline Hybrid Adcsmentioning

confidence: 99%

Trending IC design directions in 2022

Chan¹,

Cheng²,

Deng³

et al. 2022

J. Semicond.

View full text Add to dashboard Cite

show abstract

“…These ADCs consist of a front-end I-Σ∆ ADC and a back-end stage made up of a Nyquist-rate-which can either be a SAR or a Cyclic ADC-to digitize the residue voltage of the frontend I-Σ∆ stage [170]. Although I-Σ∆ ADCs have been used in low/medium frequency applications, the use of CT circuit techniques and the combination with either SAR or Pipeline ADCs is allowing their application to wideband digitizers and can also be suited to implement reconfigurable ADCs [171]- [173], which can be handled by ANNs in CR/SDR.…”

Section: Digital-friendly Analog Circuits For Ai-managed σ∆Msmentioning

confidence: 99%

AI-Managed Cognitive Radio Digitizers

Rosa

2022

IEEE Circuits Syst. Mag.

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Embedding Artificial Intelligence (AI) in integrated circuits is one of the technology pillars of the so-called digital transformation. Nowadays, the vast majority of electronic devices benefits from digital signal processing to implement more and more functionalities, which can be further enhanced by the action of AI algorithms and artefacts. Moreover, as the analog/digital interfaces are moving closer and closer to the point where the information is either acquired or transmitted, the so-called AImanaged data converters are becoming key building blocks in an increasingly number of interconnected cyberphysical systems -made up of both software and hardware components. Software Defined Radio (SDR) and Cognitive Radio (CR) systems intended for 5G/6G communications are good examples which can benefit from an early digitization managed by AI engines.In this context, this paper presents an overview of circuits and systems techniques for AI-managed analog/digital interfaces with application in SDR/CR mobile telecom systems. Some design trends and challenges are discussed, going from new communications and computing paradigms for AIoT devices and networks, to digital-based/scaling-friendly analog circuit techniques for an efficient digitization. The state of the art on Analogto-Digital Converters (ADCs) is surveyed, putting emphasis on highly-programmable Sigma-Delta Modulators (Σ∆Ms) as one of the best ADC candidates for SDR/CR transceivers. Some chip examples are shown to illustrate their potential application in AI-enhanced CR end-devices.

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Time-Continuous Σ Δ Modulation

Pelgrom

2021

Analog-to-Digital Conversion

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10.5 A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET

Cited by 9 publications

References 4 publications

Trending IC design directions in 2022

Trending IC design directions in 2022

AI-Managed Cognitive Radio Digitizers

Time-Continuous Σ Δ Modulation

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