10M-Core Scalable Fully-Implicit Solver for Nonhydrostatic Atmospheric Dynamics

Yang, Chao; Xue, Wei; Fu, Haohuan; Hongtao, You; Wang, Xinliang; Ao, Yulong; Liu, Fangfang; Gan, Lin; Xu, Peng; Wang, Lanning; Yang, Guangwen; Zheng, Weimin

doi:10.1109/sc.2016.5

Cited by 93 publications

(45 citation statements)

References 31 publications

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“…However, many scientific applications require high-order stencils in their computation. Three out of the nine nominees for the ACM Gordon Bell award in the past two years accelerated applications that involved high-order stencil computation [1,2,3], with both of the winners being among them. Compared to first-order ( Fig.…”

Section: Introductionmentioning

confidence: 99%

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL

Zohouri

Podobas

Matsuoka

2018

2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)

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In this paper we evaluate the performance of FPGAs for high-order stencil computation using High-Level Synthesis. We show that despite the higher computation intensity and onchip memory requirement of such stencils compared to first-order ones, our design technique with combined spatial and temporal blocking remains effective. This allows us to reach similar, or even higher, compute performance compared to first-order stencils. We use an OpenCL-based design that, apart from parameterizing performance knobs, also parameterizes the stencil radius. Furthermore, we show that our performance model exhibits the same accuracy as first-order stencils in predicting the performance of high-order ones. On an Intel Arria 10 GX 1150 device, for 2D and 3D star-shaped stencils, we achieve over 700 and 270 GFLOP/s of compute performance, respectively, up to a stencil radius of four. These results outperform the state-of-theart YASK framework on a modern Xeon for 2D and 3D stencils, and outperform a modern Xeon Phi for 2D stencils, while achieving competitive performance in 3D. Furthermore, our FPGA design achieves better power efficiency in almost all cases.

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Section: Introductionmentioning

confidence: 99%

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL

Zohouri

Podobas

Matsuoka

2018

2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)

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“…Promising approaches for satisfying the latter condition are exponential time integrators [36,47]; (b) to overcome the overly restrictive time-step limitations of EBTI schemes combined with highly scalable horizontal discretizations, either through horizontal/vertical splitting (HEVI) [2,8,40] or through combining SISL PBTI methods with discontinuous Galerkin (DG) discretization [99]; and (c) to further the scalability and the adaptation of algorithms to emerging HPC architectures involving SE [32] or fully-implicit time-stepping approaches [113], and further through exploiting additional parallelism with time-parallel algorithms [33].…”

Section: Discussion and Concluding Remarksmentioning

confidence: 99%

“…Preconditioners become all the more important for this class of time-integration methods if one wishes to build competitive (using the time-to-solution metric) strategies. In fact, in the past two Supercomputing conferences, the Gordon Bell prizes have been awarded to geoscience models using fully-implicit time-integrators-in 2015 for the simulation of the Earth's mantle [78] and in 2016 for the (dry) simulation of atmospheric flows [113].…”

Section: Dymentioning

confidence: 99%

Current and Emerging Time-Integration Strategies in Global Numerical Weather and Climate Prediction

Mengaldo

Wyszogrodzki

Diamantakis

et al. 2018

Arch Computat Methods Eng

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The continuous partial differential equations governing a given physical phenomenon, such as the Navier-Stokes equations describing the fluid motion, must be numerically discretized in space and time in order to obtain a solution otherwise not readily available in closed (i.e., analytic) form. While the overall numerical discretization plays an essential role in the algorithmic efficiency and physically-faithful representation of the solution, the time-integration strategy commonly is one of the main drivers in terms of cost-to-solution (e.g., time-or energy-to-solution), accuracy and numerical stability, thus constituting one of the key building blocks of the computational model. This is especially true in time-critical applications, including numerical weather prediction (NWP), climate simulations and engineering. This review provides a comprehensive overview of the existing and emerging time-integration (also referred to as time-stepping) practices used in the operational global NWP and climate industry, where global refers to weather and climate simulations performed on the entire globe. While there are many flavors of time-integration strategies, in this review we focus on the most widely adopted in NWP and climate centers and we emphasize the reasons why such numerical solutions were adopted. This allows us to make some considerations on future trends in the field such as the need to balance accuracy in time with substantially enhanced time-to-solution and associated implications on energy consumption and running costs. In addition, the potential for the co-design of time-stepping algorithms and underlying high performance computing hardware, a keystone to accelerate the computational performance of future NWP and climate services, is also discussed in the context of the demanding operational requirements of the weather and climate industry.

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“…By aggregating over 40K SW26010 processors, the Sunway TaihuLight supercomputer can deliver an HPL performance of 93 Pflops/s in double precision. Ever since its release in 2016, a number of applications have been ported on Sunway TaihuLight, including atmospheric modeling [51], earthquake simulations [21], and phase field simulations [52], among many others. Previous studies on optimizing dense matrix multiplications for the SW26010 processor have been done in References [31,36].…”

Section: Introductionmentioning

confidence: 99%

Enabling Highly Efficient Batched Matrix Multiplications on SW26010 Many-core Processor

Jiang

Yang

2020

ACM Trans. Archit. Code Optim.

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We present a systematic methodology for optimizing batched matrix multiplications on SW26010 many-core processor of the Sunway TaihuLight supercomputer. Five surrogate algorithms and a machine learning-based algorithm selector are proposed to fully exploit the computing capability of SW26010 and cope with the sophisticated algorithm characteristics of batched matrix multiplications. Experiment results show that the algorithm selector is able to adaptively choose the appropriate algorithm for various matrix shapes and batch sizes with low overhead and high accuracy. In particular, the optimized batched matrix multiplications can substantially outperform the non-batched version and reach around 84.8% of the performance upper bound.

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10M-Core Scalable Fully-Implicit Solver for Nonhydrostatic Atmospheric Dynamics

Cited by 93 publications

References 31 publications

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL

Current and Emerging Time-Integration Strategies in Global Numerical Weather and Climate Prediction

Enabling Highly Efficient Batched Matrix Multiplications on SW26010 Many-core Processor

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