2017 IEEE International Solid-State Circuits Conference (ISSCC) 2017
DOI: 10.1109/isscc.2017.7870330
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11.3 A 10nm 32Kb low-voltage logic-compatible anti-fuse one-time-programmable memory with anti-tampering sensing scheme

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Cited by 7 publications
(2 citation statements)
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“…Therefore, a change in the key requires modifying the mask layout. Efuse [1] and anti-fuse [2,3] are one-time programmable (OTP) memories, which can be built in a generic digital process, but the programming operation is irreversible. A battery-backed SRAM is a power-gated SRAM in data retention mode.…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, a change in the key requires modifying the mask layout. Efuse [1] and anti-fuse [2,3] are one-time programmable (OTP) memories, which can be built in a generic digital process, but the programming operation is irreversible. A battery-backed SRAM is a power-gated SRAM in data retention mode.…”
Section: Introductionmentioning
confidence: 99%
“…A 4Kx8 macro [9] was shown having almost the same program window as the 4Kx8 array [8], can be read at very low voltage and fully testable [9]. A comparison table [9] with other OTPs [5], [10]- [15] indicates the I-fuse is the best in all figures of merit. This article is an enhanced version of [9] with more data in different temperatures and process corners, and more analyses on I-fuse technology, testability and qualification.…”
Section: Introductionmentioning
confidence: 99%