IET Irish Signals and Systems Conference (ISSC 2012) 2012
DOI: 10.1049/ic.2012.0191
|View full text |Cite
|
Sign up to set email alerts
|

12 MHz to 5800 MHz Fully Integrated, Dual Path Tuned, Low Jitter, LC-PLL Frequency Synthesizer

Abstract: -This paper presents a realised prototype of fully integrated CMOS LC-PLL frequency synthesizer. The circuit delivers a wide range of clock signals between 12 MHz and 5800 MHz, with average long term jitter of only 4 ps. The primary application of the presented circuit includes high speed series data transmission links. Low power consumption of the complete synthesizer (including bias circuitry), in the range of 50mW from dual 1.2 V/3.3 V supply, is in line with energy efficient solutions for modern electronic… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Publication Types

Select...

Relationship

0
0

Authors

Journals

citations
Cited by 0 publications
references
References 6 publications
0
0
0
Order By: Relevance

No citations

Set email alert for when this publication receives citations?