18-GHz, 4.0-aJ/bit Operation of Ultra-Low-Energy Rapid Single-Flux-Quantum Shift Registers

Tanaka, Masamitsu; Ito, Masato; Kitayama, Akira; Kouketsu, Tomohito; Fujimaki, Akira

doi:10.7567/jjap.51.053102

Cited by 88 publications

(26 citation statements)

References 15 publications

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“…A DIABATIC Quantum-Flux-Parametron (AQFP) logic [1], [2] is one of the energy-efficient superconductor logics [3]- [5]. Among these devices, AQFP logic is very energyefficient and can achieve sub-I c Φ 0 bit-energy operation because of adiabatic switching.…”

Section: Introductionmentioning

confidence: 99%

High-Speed Experimental Demonstration of Adiabatic Quantum-Flux-Parametron Gates Using Quantum-Flux-Latches

Takeuchi

Ortlepp

Yamanashi

et al. 2014

IEEE Trans. Appl. Supercond.

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We experimentally demonstrated high-speed logic operations of adiabatic quantum-flux-parametron (AQFP) gates through the use of quantum-flux-latches (QFLs). In QFL-based high-speed test circuits (QHTCs), the output data of the circuits under test (CUTs), which are driven by high-speed excitation currents, are stored in QFLs and are slowly read out using low-speed excitation currents. We designed and fabricated three types of QHTCs using QFLs with different circuit parameters, where the CUTs were buffer gates and AND gates. We confirmed the correct operation of buffer gates and AND gates at 1 GHz. The obtained bias margins of the 1 GHz excitation currents were more than ±30% for each QHTC, which is wide enough for high-speed logic operations of AQFP gates.Index Terms-Adiabatic logic, adiabatic quantum-fluxparametron (AQFP), high-speed operation, Josephson circuits, latch, superconducting integrated circuits.

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Section: Introductionmentioning

confidence: 99%

High-Speed Experimental Demonstration of Adiabatic Quantum-Flux-Parametron Gates Using Quantum-Flux-Latches

Takeuchi

Ortlepp

Yamanashi

et al. 2014

IEEE Trans. Appl. Supercond.

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“…A lower bias voltage can be selected for lower power operation, called the low-voltage RSFQ (LV-RSFQ) technique [20]. The static power consumed at bias feed resistors is reduced drastically compared to the standard RSFQ circuit design in exchange for a small decrease in switching speed, resulting in better energy efficiency.…”

Section: Low-voltage Circuitsmentioning

confidence: 99%

“…The static power consumed at bias feed resistors is reduced drastically compared to the standard RSFQ circuit design in exchange for a small decrease in switching speed, resulting in better energy efficiency. According to our previous studies that suggested the most energy-efficient bias voltage in LV-RSFQ circuits over the range of 0.1 to 1.0 I c R [20], [21], we selected 0.5 mV (0.43 I c R). The estimated reduction in power and switching time is 80% and 20%, respectively.…”

Section: Low-voltage Circuitsmentioning

confidence: 99%

Rapid Single-Flux-Quantum Circuits Fabricated Using <inline-formula> <tex-math notation="TeX">$\hbox{20}\hbox{-}\hbox{kA}/\hbox{cm}^{2}$</tex-math></inline-formula> <inline-formula> <tex-math notation="TeX">$\hbox{Nb}/\hbox{AlO}_{x}/\hbox{Nb}$</tex-math></inline-formula> Process

Tanaka

Kozaka

Kita

et al. 2015

IEEE Trans. Appl. Supercond.

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We designed and fabricated rapid single-fluxquantum (RSFQ) circuits using a new 20-kA/cm 2 process based on conventional Nb/AlO x /Nb Josephson junction (JJ) technology. Circular JJs were fabricated to improve their uniformity. They had sufficiently low spread of the critical currents for large-scale RSFQ circuits. We selected the circuit design parameters carefully, including the bias voltage and McCumber-Stewart parameter, balancing the energy consumption, switching speeds, margins, and integration density. We demonstrated several logic gates and shift registers at a clock frequency of 154 GHz with the designed bias voltage of 2.5 mV, and demonstrated energy-efficient shift registers using the low-voltage RSFQ (LV-RSFQ) technique at 83 GHz.Index Terms-Energy efficient, low power, low-voltage, rapid single-flux-quantum logic, shift register, superconducting integrated circuits.

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“…In this study, we employed two different approaches to reduce power consumption: the use of miniaturized JJs with smaller critical currents, or lowering bias voltages [9]. Both of the approaches can result in increase of bit error rates (BERs) because of the reduced signal-to-noise ratio.…”

Section: Introductionmentioning

confidence: 99%

Bit error rate in low-voltage RSFQ circuits with small critical currents/lowered bias voltages

Tanaka

Kitayama

Takinami

et al. 2013

2013 IEEE 14th International Superconductive Electronics Conference (ISEC)

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We report experimental results of bit-error-rate (BER) measurements in small-critical-current or lowered-biasvoltage rapid single-flux-quantum (RSFQ) circuits for power reduction. In such reduced-power RSFQ circuits, the BERs can be increased because of the reduced signal-to-noise ratio. We fabricated 2-bit shift registers using a 2.5-kA/cm 2 niobium process, and measured BERs by low-frequency tests at 4.2 K. We obtained sufficiently wide bias margins when we reduced the critical currents in a range of 1/2 to 1/4 of the conventional design, while it narrowed as the critical currents reduced to 1/8. For low-voltage shift registers, the bias margins linearly decreased in width as bias voltages were lowered. We found that 0.25 mV, 1/10 of the conventional design, was a good bias voltage to balance competing power reduction and bias margin.Keywords-rapid single-flux-quantum logic, RSFQ, low power, low voltage, energy efficient, bit error rate.

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18-GHz, 4.0-aJ/bit Operation of Ultra-Low-Energy Rapid Single-Flux-Quantum Shift Registers

Cited by 88 publications

References 15 publications

High-Speed Experimental Demonstration of Adiabatic Quantum-Flux-Parametron Gates Using Quantum-Flux-Latches

High-Speed Experimental Demonstration of Adiabatic Quantum-Flux-Parametron Gates Using Quantum-Flux-Latches

Rapid Single-Flux-Quantum Circuits Fabricated Using <inline-formula> <tex-math notation="TeX">$\hbox{20}\hbox{-}\hbox{kA}/\hbox{cm}^{2}$</tex-math></inline-formula> <inline-formula> <tex-math notation="TeX">$\hbox{Nb}/\hbox{AlO}_{x}/\hbox{Nb}$</tex-math></inline-formula> Process

Bit error rate in low-voltage RSFQ circuits with small critical currents/lowered bias voltages

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