2.3–21 GHz broadband and high linearity distributed low noise amplifier

Moustapha, El Bakkali; Elftouh, Hanae; Naima, Amar Touhami; Taj-eddin, Elhamadi

doi:10.1016/j.vlsi.2020.09.005

Cited by 11 publications

(5 citation statements)

References 20 publications

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“…Today, distributed amplifiers have become good candidates for providing flat gain in a sufficiently wide band [10]. Monolithic microwave integrated circuit or MMIC technology seems a priori, the best suited to achieve this objective.…”

Section: Device Characteristics and Mmic Processmentioning

confidence: 99%

“…The error of the input and output reflection coefficients (S11 and S22) of the two models is weak compared to the direct and inverse gain parameters (S21 and S12) which can be as high as 30% when the frequency becomes larger. These Monolithic Microwave Integrated Circuit (MMIC) chips are Today, distributed amplifiers have become good candidates for providing flat gain in a sufficiently wide band [10]. Monolithic microwave integrated circuit or MMIC technology seems a priori, the best suited to achieve this objective.…”

Section: Device Characteristics and Mmic Processmentioning

confidence: 99%

“…In distributed amplifiers, the active elements are placed between two propagation lines which carry out both an addition of the currents and adaptation to the source and to the load. Today, distributed amplifiers have become good candidates for providing flat gain in a sufficiently wide band [10]. Monolithic microwave integrated circuit or MMIC technology seems a priori, the best suited to achieve this objective.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

UWB-MMIC Matrix Distributed Low Noise Amplifier

Bakkali

Elkhaldi

Hamzi

et al. 2020

The 14th International Conference on Interdisciplinarity in Engineering—INTER-Eng 2020

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In this paper, a 3.1–11 GHz ultra-wideband low noise amplifier with low noise figure, high power gain S21, low reverse gain S12, and high linearity using the OMMIC ED02AH process, which employs a 0.18 μm Pseudomorphic High Electron Mobility Transistor is presented. This Low Noise Amplifier (LNA) was designed with the Advanced Design System simulator in distributed matrix architecture. For the low noise amplifier, four stages were used obtaining a good input/output matching. An average power gain S21 of 11.6 dB with a gain ripple of ±0.6 dB and excellent noise figure of 3.55 to 4.25 dB is obtained in required band with a power dissipation of 48 mW under a supply voltage of 2 V. The input compression point 1 dB and third-order input intercept point are −1.5 and 23 dBm respectively. The core layout size is 1.8 × 1.2 mm2.

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Section: Device Characteristics and Mmic Processmentioning

confidence: 99%

Section: Device Characteristics and Mmic Processmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

UWB-MMIC Matrix Distributed Low Noise Amplifier

Bakkali

Elkhaldi

Hamzi

et al. 2020

The 14th International Conference on Interdisciplinarity in Engineering—INTER-Eng 2020

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“…Conventional wireless receivers often rely on the inductor degenerated LNA, which possesses desirable attributes [1][2][3], but within a narrow frequency band centred around a single frequency [4,5]. Alternatively, distributed amplifiers (DAs) [6][7][8][9][10][11] offer enhanced impedance matching and high gain across a broader frequency range, albeit necessitating multiple inductors. Another approach for designing broadband LNAs involves employing current conveyors (CC) [12][13][14].…”

Section: Introductionmentioning

confidence: 99%

Innovative techniques for achieving flat response in a dual-resonance ultra-wideband low-noise amplifier

Reddy,

Nath

2024

Phys. Scr.

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This paper introduces a two-stage ultra-wideband low-noise amplifier (UWB-LNA) intended to be used in wireless communication systems. The architecture uses a novel double-resonance load network in the first stage and resistive shunt feedback in the second stage to achieve wide bandwidth with a flat response. A common gate stage at the input port seeks to present a high-impedance load to the single resonant network, while concurrently shunt negative feedback, source degeneration, and cascoded feedback schemes are used to improve performance. In this respect, the cascoded feedback provides flat gain across a wide bandwidth, while the source degeneration helps in impedance matching. Post-layout foot-print for the UWB-LNA designed and simulated using Cadence Virtuoso 180nm technology is0.532 mm² with an operating frequency 3.1–10.6 GHz incorporated. Operating on a 1.8 V supply voltage, it consumes 6 mW of power. The amplifier achieves a maximum gain of 18.75 dB, maintaining a flat low noise figure of 3.15 dB across frequencies ranging from 3.1 to 10.6 GHz. Stability analysis using the Roulettes test confirms the reliability of the proposed LNA, with Kf > 1 and Δ < 1.

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“…A variety of schematic designs and IC manufacturing technologies (Si, SiGe, InP, GaAs, GaN) has opened the possibility of developing ultrawideband amplifiers for various dynamic ranges: low-noise amplifiers, buffer amplifiers (BA), and power amplifiers. [35][36][37] In the frequency range under study, a set of requirements for the integrated microwave DA may include the following characteristics: small-signal parameters (S-parameters), NF, dynamic parameters, stability coefficients, and so on. For example, for LNA it is necessary to provide a given NF, and for PA the critical characteristics are an output 1 dB compression point (OP 1dB ), added power efficiency (PAE), and so on.…”

Section: Introductionmentioning

confidence: 99%

A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

Metel

Добуш

Kalentyev

et al. 2023

Int J Numerical Modelling

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This article presents a genetic algorithm‐based technique for microwave integrated distributed amplifier synthesis. To speed‐up synthesis, only linear characteristics are used in the goal function. The technique uses MMIC foundry process design kit models providing manufacturing‐ready schematics to be found. The models from the process design kit are presented as S‐parameters again to enhance algorithm performance. The technique allows searching among most of the existing schematics of the microwave distributed amplifier but is not limited to typical topologies. The section number is theoretically unlimited and makes it possible to find principally new circuit topology. The synthesis shortens and simplifies the distributed amplifier design time. Experimental validation of the technique is carried out by synthesizing the broadband driver stage for the 20–30 GHz buffer amplifier. The technique produces several amplifier topologies meeting the requirements. The most appropriate circuit was manufactured using a commercial 0.25 μm GaAs pHEMT process. The manufactured buffer amplifier demonstrates a gain of 10 dB and 20 dBm output power at a 1 dB compression point.

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2.3–21 GHz broadband and high linearity distributed low noise amplifier

Cited by 11 publications

References 20 publications

UWB-MMIC Matrix Distributed Low Noise Amplifier

UWB-MMIC Matrix Distributed Low Noise Amplifier

Innovative techniques for achieving flat response in a dual-resonance ultra-wideband low-noise amplifier

A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

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