2016 IEEE International Solid-State Circuits Conference (ISSCC) 2016
DOI: 10.1109/isscc.2016.7418118
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28.6 A ±50mV linear-input-range VCO-based neural-recording front-end with digital nonlinearity correction

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Cited by 20 publications
(15 citation statements)
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“…Although Neuro-stack is much smaller than other external systems, an even smaller version could be tested in future in-vivo studies since its IC chips are all implantable by design [29][30][31][32][33]37] and require a combined area of just 113 mm 2 (ICs from all layers, four analog and one digital). An implantable version of the Neuro-stack [30] but with its added single-neuron and closed-loop stimulation capabilities thus presents an exciting avenue towards a completely wireless intracranial single-unit and LFP recording system that would not be susceptible to motion artifacts.…”
Section: Discussionmentioning
confidence: 99%
See 1 more Smart Citation
“…Although Neuro-stack is much smaller than other external systems, an even smaller version could be tested in future in-vivo studies since its IC chips are all implantable by design [29][30][31][32][33]37] and require a combined area of just 113 mm 2 (ICs from all layers, four analog and one digital). An implantable version of the Neuro-stack [30] but with its added single-neuron and closed-loop stimulation capabilities thus presents an exciting avenue towards a completely wireless intracranial single-unit and LFP recording system that would not be susceptible to motion artifacts.…”
Section: Discussionmentioning
confidence: 99%
“…The analog layer (Fig. 1b, bottom) contains mixed-signal sensing IC (Sense IC and Spike IC) and stimulation IC (Stim IC) chips, which were previously developed as part of the DARPA SUBNETS program [29][30][31][32]. A single Sense IC (one per analog layer) accepts neural activity from up to 64 electrode contacts fed into voltage-controlled oscillators (VCO), which serve as analog-digital converters (ADC).…”
mentioning
confidence: 99%
“…TD systems encode information with respect to the timing intervals of asynchronous digital signals to perform mixed signal processing while extensively using standard logic and oscillators that do not suffer from analogue complications. Many recent publications will indicate the potential for exceptional dynamic range like in the recording system of [3] or highly compact instrumentation like the potentiostat in [4]. We argue that a key advantage for these systems is that supply voltage is utilized more effectively from a fundamental aspect without being impeded by linearity.…”
Section: Introductionmentioning
confidence: 94%
“…This demonstrates that a passive implementation is impossible, and for this reason a better approach would be to employ pseudo-resistors. There have been several ways proposed to synthesize very high resistances, for instance, Jiang [2] used a switched resistor with a clock, but this requires an extra clock generator which is power hungry. Several people attempted to solve the problem with the subthreshold region based MOS resister [3], [6], and they achieved very a high resistance without consuming much power but poor linearity, therefore this is the approach considered here to synthesize a high value resistor whilst proposing a novel biasing technique to improve the linearity.…”
Section: Vin Voutmentioning
confidence: 99%