28-nm FD-SOI CMOS RF Figures of Merit Down to 4.2 K

Abstract

This work presents a detailed RF characterization of 28-nm FD-SOI nMOSFETs at cryogenic temperatures down to 4.2 K. Two main RF Figures of Merit (FoMs), i.e. current-gain cutoff frequency (ft) and maximum oscillation frequency (fmax), as well as parasitic elements of the small-signal equivalent circuit, are extracted from the measured S-parameters. An improvement of up to ~130 GHz in ft and ~75 GHz in fmax is observed for the shortest device (25 nm) at low temperature. The behavior of RF FoMs versus temperature is discussed in terms of small-signal equivalent circuit elements, both intrinsic and extrinsic (parasitics). This study suggests 28-nm FD-SOI nMOSFETs as a good candidate for future cryogenic applications down to 4.2 K and clarifies the origin and limitations of the performance.

Extensive Electrical Characterization Methodology of Advanced MOSFETs Towards Analog and RF Applications

“…Therefore, depending on the target application, either high-frequency/high-current, or baseband (high-precision, gain), one would choose device with strain or without, respectively. Finally, Figure 2d demonstrates effect of temperature down to 4.2 K on gm/Id versus Id/(W/L) plot [62,64]. Temperature lowering is seen beneficial both in weak inversion (due to subthreshold slope improvement) and in strong inversion (due to mobility improvement), and thus for both base-band and high-frequency applications.…”

“…Recently, fT values as high as 360 GHz for 30 nm-long device [69], compatible with ITRS requirements for low-power applications, were reported achievable in this technology with further device/process optimization. Figure 16 gives another example case, namely RF performance evolution in the cryogenic temperature range, when separate extraction was important for the proper device modeling [64]. Strong improvement of RF FoMs (~130 and 75 GHz for fT and fmax, respectively, for 25 nm-long FDSOI device) is evident with temperature reduction (Fig.…”

“…(c) gm/Id as a function of Id/(W/L) in FinFETs with and without strain [58]. (d) gm/Id as a function of Id/(W/L) in FDSOI MOSFET at different temperatures[62,64].…”

“…gm -Av metric application in the case of (a) various NW MOSFETs[56], (b) FDSOI MOSFETs at room and cryogenic temperatures[62,64]; (c) UTBB SOI MOSFETs at different back-gate biases[57]; (d) UTBB SOI MOSFETs operating in ADG and QDG regimes[49,50].…”

Low Temperature Characterization and Modeling of FDSOI Transistors for Cryo CMOS Applications

“…Some works have studied bulk MOSFETs operation at cryogenic temperature emphasizing in particular kink behavior and freeze-out effects in those devices [7,15,[20][21][22][23][24]. Recently, outstanding characteristics have been demonstrated at 4.2 K on advanced CMOS technologies [19,[25][26][27], in particular for Fully Depleted Silicon-On-Insulator (FDSOI) [28][29][30][31][32]. Ultrathin film FDSOI devices (with typically silicon thickness less than 10 nm) are immune to kink effects [33], and freeze-out has finally little impact on the DC characteristics of MOSFETs in advanced technologies [34].…”