2D curtailed harmonic memory polynomial for reduced complexity in concurrent dual‐band modelling and digital predistortion with the second band at harmonic frequency

Jaraut, Praveen; Rawat, Meenakshi; Ghannouchi, Fadhel M.

doi:10.1049/iet-com.2017.1376

Cited by 4 publications

(3 citation statements)

References 26 publications

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“…The results reported in [15] is comparable to the proposed work when it is validated with the instrumentbased test-bed. However, the results reported in [12]- [14] are comparable with the proposed scheme even using a low-cost embedded platform.…”

Section: Measurement Setup and Measured Results Of Predistortion And Harmonic Cancellationmentioning

confidence: 67%

“…Considering the scenario, where no additional reference signal is added at the input of PA, the Table 1 compares the complexity in terms of the number of coefficient of the harmonic models available in the state of the art. From the above table, one can see that proposed RVFTDNN model has low complexity in terms of number of coefficient of 2 dimensional harmonic memory polynomial (2D-HMP), and 3 dimensional harmonic memory polynomial (3D-HMP) models in [12], [14]- [15]. Whereas, number of coefficients of proposed RVFTDNN are comparable to the 2 dimensional memory polynomial (2D-MP) reported in [13].…”

Section: B Comparision Of Nn Model With the Exiting Harmonic Related Solutionsmentioning

confidence: 82%

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Digitally Assisted Harmonic Cancellation for Multi-Octave Filter-Less Transmitter

Singhal

Rawat

2020

IEEE Access

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This paper presents and demonstrates the design of a filter-less transmitter architecture with digitally assisted harmonic cancellation. A neural network is used to model the harmonics as well as IMD for digital predistortion applications. This neural network-based harmonic modeling does not require any reference signal to be injected at the input of PA, thereby reducing the complexity in characterizing the harmonics. An in-house 10 W PA operating from VHF to L-band has been designed and characterized for its harmonic suppression. This PA is used along with agile RF transceiver AD9361 from Analog Device and Xilinx embedding platform using Zynq ZC-706 system-on-chip for implementing the entire transmitter. The receiver of AD9361 captures the nonlinearity of the PA in terms of harmonics as well as intermodulation distortion (IMD) components for modeling and predistortion. The proposed architecture can handle all types of distortions due to hardware as well as PA nonlinearity. Besides, it is also able to cancel the harmonics using a harmonic injection in the feed-forward configuration. This transmitter architecture has the advantages of being low cost, filter-less, wideband, frequency agile, reconfigurable and less bulky compared to the conventional scheme. The proposed scheme is demonstrated to transmit 5 MHz LTE signal at different frequencies over the range of 100 MHz to 400 MHz. In such a case, the second and third harmonics appear over the frequency range from 200 MHz to 1.2 GHz, which are within the amplification range of PA, yet they are suppressed without using any filter at the output. More than −40 dBc harmonic rejection is achieved over the entire operating range of this filter-less transmitter. The adjacent channel leakage ratio (ACLR) is always better than −45 dBc after applying digital predistortion.

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Section: Measurement Setup and Measured Results Of Predistortion And Harmonic Cancellationmentioning

confidence: 67%

Section: B Comparision Of Nn Model With the Exiting Harmonic Related Solutionsmentioning

confidence: 82%

Digitally Assisted Harmonic Cancellation for Multi-Octave Filter-Less Transmitter

Singhal

Rawat

2020

IEEE Access

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“…In the last two decades, digital predistortion (DPD) technique has emerged as an effective technique for linearisation of PA using already available field‐programmable gate array (FPGA) or a digital processor in the base‐station [7–31]. The major challenges in the implementation of DPD are wider bandwidth support, multi‐band operation, power consumption, and hardware cost of digital processor or FPGA.…”

Section: Introductionmentioning

confidence: 99%

Digital predistortion technique for low resource consumption using carrier aggregated 4G/5G signals

Jaraut¹,

Rawat²,

Roblin

2019

IET Microwaves, Antennas & Propagation

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Carrier aggregation (CA) is an essential part of long-term evolution (LTE) signals for 4G/5G wireless communication. However, CA LTE signals place stringent conditions on the radio-frequency power amplifiers (PAs). The multi-band operation, wider bandwidth, and related hardware cost increase for the implementation of digital predistortion (DPD) for the multi-band PAs. This study presents a novel independent component analysis (ICA) method for the DPD models which is suitable for all three cases (intra-band contiguous, intra-band non-contiguous and inter-band non-contiguous) of CA. It has been established that the memory requirement of ICA-based memory polynomial (MP) model implementation is much lesser than the state-of-theart low complexity models such as MP model, orthogonal MP model and principal component analysis-based MP model for CA LTE signals. The proof-of-concept is provided with two different measurement setups for establishing its versatility.

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Harmonically Related Concurrent Tri-Band Behavioral Modeling and Digital Predistortion

Jaraut

Rawat

Ghannouchi

2019

IEEE Trans. Circuits Syst. II

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2D curtailed harmonic memory polynomial for reduced complexity in concurrent dual‐band modelling and digital predistortion with the second band at harmonic frequency

Cited by 4 publications

References 26 publications

Digitally Assisted Harmonic Cancellation for Multi-Octave Filter-Less Transmitter

Digitally Assisted Harmonic Cancellation for Multi-Octave Filter-Less Transmitter

Digital predistortion technique for low resource consumption using carrier aggregated 4G/5G signals

Harmonically Related Concurrent Tri-Band Behavioral Modeling and Digital Predistortion

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