3–20-GHz GaN MMIC Power Amplifier Design Through a C<sub>OUT</sub> Compensation Strategy

Rubio, Jorge Julián Moreno; Quaglia, Roberto; Piacibello, Anna; Camarchia, Vittorio; Tasker, P.J.; Cripps, Steve C.

doi:10.1109/lmwc.2021.3066282

Cited by 15 publications

(6 citation statements)

References 11 publications

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“…The complexity of the architecture, that is, the number of active devices, the presence of integrated driver stages, the spatial proximity of the active devices 34,35 and the presence or absence of isolating elements among them, has also an impact on its sensitivity. For instance, the single-device wideband PA of 36 presents a very good agreement between the target and the obtained frequency band, whereas the two-stage Doherty PA with embedded drivers presented in 37 is affected by a 2-GHz frequency shift. It allows however to fully cover the targeted band thanks to a specific wideband design approach.…”

mentioning

confidence: 79%

Analysis of the impact of prototyping‐related parasitic effects in a hybridGaNpower amplifier for5G FR1applications

Bartolotti,

Zhang,

Shi

et al. 2023

Int J Numerical Modelling

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This article analyses the impact of parasitic effects encountered in the manufacturing of a Gallium Nitride power amplifier optimized for a specific trade‐off of efficiency and linearity at 5G FR1 frequencies. The analysis focuses on an example based on a packaged transistor and implemented in hybrid technology, adopting a two‐layer printed circuit board for passive distributed elements and surface‐mount lumped components. The design is summarized, and the focus is then posed on the comparison of simulated and measured results, the main causes of inaccuracy in their agreement, and a simple way of reproducing these in simulation. The mechanical stability of the assembly and the sensitivity of the second harmonic control are identified as the main sources of performance degradation. These effects are correctly modeled at the simulation level thanks to the insertion of specific parasitic lumped elements but could not be fully eliminated at the experimental level in this specific prototype. However, post‐tuning performed on the prototype, guided by the proposed analysis, still allows to reach satisfactory performance although somewhat sub‐optimal compared to the one expected from simulations. At 3.5 GHz, the re‐tuned PA demonstrates a measured output power in excess of 37.5 dBm at saturation, with associated gain higher than 14 dB and PAE of 60%. In a 2‐tone test with 20 MHz spacing, the IMD3 remains lower than −30 dBc up to 29 dBm of output power with a corresponding PAE of the order of 32%.

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mentioning

confidence: 79%

Analysis of the impact of prototyping‐related parasitic effects in a hybridGaNpower amplifier for5G FR1applications

Bartolotti,

Zhang,

Shi

et al. 2023

Int J Numerical Modelling

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“…From the perspective of conjugate matching, a symmetrical network with embedded C out would be a good compensator, as shown in Figure 4, where the custom network N s is symmetrical, of course, and b is the susceptance of C out or a commensurate open stub at the operating frequency [22,23]. The transmission matrix components of the symmetrical compensation network (SCN) are defined as A, B, C, and A without subscripts, and those of N s include the same letters paired with subscript 1.…”

Section: Discussion Of Solutions To Compensate C Outmentioning

confidence: 99%

Efficient GaN-on-Si Power Amplifier Design Using Analytical and Numerical Optimization Methods for 24–30 GHz 5G Applications

Peng

Zhang

2023

Electronics

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This paper presents the design procedure of an efficient compact monolithic microwave integrated circuit power amplifier (MMIC PA) in a 0.1 μm GaN-on-Si process for 5G millimeter-wave communication. Load/source-pull simulations were conducted to correctly create equivalent large-signal matching models for stabilized power cells and to determine the optimal impedance domain. The shorted stub with bypass capacitors minimizes the transistor’s output reactance, simplifying the matching objective to an approximate real impedance transformation (IT). With miniaturization as the implementation guide, explicit formulas and tabulated methods based on mathematical analysis were applied to synthesize the filtering matching networks (MNs) for the input and output stages. In addition, a CAD-dependent numerical optimization approach was used for the interstage MN that needs to cope with high IT ratio and complex loads. The continuous-wave (CW) characterization for the proposed two-stage PA demonstrated 19.8 ± 0.7 dB of small-signal gain, very flat output power (Pout) and power-added efficiency (PAE) at 4 dB gain compression of 32–32.4 dBm and 34–34.6%, respectively, over 24–30 GHz, with 37.1% of peak PAE at mid-frequency.

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“…It is possible to have infinite ∆ f with zero value capacitance, so properly handling C out is the key to realizing a broadband OMN. There are two main ways: (1) tune existing matching elements or add specialized susceptance cancelation circuitry to minimize the effect of C out [ 26 , 27 ], where passive negative susceptance networks, such as a compensating shunt inductor are preferable and more prevalent [ 23 ] and (2) absorb C out into matching. Unfortunately, the C out of 0.27 pF seems so large that neither compensation nor absorption appears to be a cost-effective or even a feasible option for on-chip wideband matching.…”

Section: Design and Implementation Of Matching Networkmentioning

confidence: 99%

An Efficient 24–30 GHz GaN-on-Si Driver Amplifier Using Synthesized Matching Networks

et al. 2023

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This paper presents a broadband GaN microwave monolithic integrated circuit driver amplifier (MMIC DA) with compact dimensions of 1.65 mm × 0.78 mm for 5G millimeter-wave communication. The optimal impedance domain satisfying the preset goals was first acquired using the simplified load-pull procedure and small-signal simulations, followed by a weighted average method to determine the reference center matching point from which the optimal intrinsic load can be deduced. By means of de-embedding load-pull contours, modeling based on theoretical analysis, and simulation fitting for parameter identification, the nonlinear output capacitance and a series RLC model circuit approximating the input impedance response of the stabilized transistor were extracted. Under the design principle of fully absorbing the parasitic parameters of the device, explicit formulas and tabulated methods related to the Chebyshev impedance transformer were applied to construct filter-based synthesized matching networks at each stage and finally convert them into an implementable mixed-element form via the single-frequency equivalence technique. Measured on-wafer pulsed results for the proposed two-stage DA across 24–30 GHz demonstrated up to 31.1 dBm of saturated output power (Psat) with less than 1 dB total fluctuation, 19.3 ± 1 dB of small-signal gain, and 39.8% of peak power-added efficiency (PAE) at the mid-frequency.

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3–20-GHz GaN MMIC Power Amplifier Design Through a C_OUT Compensation Strategy

Cited by 15 publications

References 11 publications

Analysis of the impact of prototyping‐related parasitic effects in a hybridGaNpower amplifier for5G FR1applications

Analysis of the impact of prototyping‐related parasitic effects in a hybridGaNpower amplifier for5G FR1applications

Efficient GaN-on-Si Power Amplifier Design Using Analytical and Numerical Optimization Methods for 24–30 GHz 5G Applications

An Efficient 24–30 GHz GaN-on-Si Driver Amplifier Using Synthesized Matching Networks

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3–20-GHz GaN MMIC Power Amplifier Design Through a COUT Compensation Strategy

Cited by 15 publications

References 11 publications

Analysis of the impact of prototyping‐related parasitic effects in a hybridGaNpower amplifier for5G FR1applications

Analysis of the impact of prototyping‐related parasitic effects in a hybridGaNpower amplifier for5G FR1applications

Efficient GaN-on-Si Power Amplifier Design Using Analytical and Numerical Optimization Methods for 24–30 GHz 5G Applications

An Efficient 24–30 GHz GaN-on-Si Driver Amplifier Using Synthesized Matching Networks

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3–20-GHz GaN MMIC Power Amplifier Design Through a C_OUT Compensation Strategy