3-Dimensional Analysis on the GIDL Current of Body-tied Triple Gate FinFET

Byun, Hyun-Sook; Lee, Won-Sok; Lee, Jin Woo; Lee, Keun-Ho; Park, Young-Kwan; Kong, Jeong-Taek

doi:10.1109/sispad.2006.282887

Cited by 9 publications

(1 citation statement)

References 3 publications

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“…Gate induced drain leakage (GIDL) is found to be the limiting factor in achieving ultralow values (<100pA/µm) of OFF current. There are several studies which discuss approaches to reduce GIDL [15] [16]. The IOFF can be lowered by increasing the threshold voltage of the transistor.…”

Section: History Of Finfetsmentioning

confidence: 99%

Design strategies for ultra-low power 10 nm FinFETs

Walke

Schlenvogt²,

Kurinec

2017

Solid-State Electronics

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Before getting to the core of this master thesis, I would like to take some time to thank all those people who made this project possible. Firstly, I would like to express my sincere gratitude to my advisor Prof. Santosh Kurinec for her valuable guidance, consistent encouragement, and all kinds of support throughout my research work. Without her endless advices and persistent help, this work would not have been possible. This work was partially supported by Silvaco. I would like to thank Dr. Garrett Schlenvogt from Silvaco who provided insight and expertise that greatly assisted in conducting this research. I also would like to thank Dr. Karl Hirschman and Dr. Robert Pearson for the comments that greatly improved manuscript. Finally, I want to thank my parents and my elder brother for all the love and support that they gave me during this year. Without their support this thesis would not be here. iv

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Section: History Of Finfetsmentioning

confidence: 99%