2024 IEEE International Solid-State Circuits Conference (ISSCC) 2024
DOI: 10.1109/isscc49657.2024.10454387
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30.6 Vecim: A 289.13GOPS/W RISC-V Vector Co-Processor with Compute-in-Memory Vector Register File for Efficient High-Performance Computing

Yipeng Wang,
Mengtian Yang,
Chieh-Pu Lo
et al.
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“…Moreover, researchers are collaborating and considering challenges from a systematic perspective to help CIM integrate into real computing systems. A DCIM-based neural visual-enhancement engine (NVE) is fabricated in the 3 nm process through the collaboration of MediaTek and TSMC [17] . Wang et al from the University of Texas at Austin present Vecim, a RISC-V vector co-processor integrated with a CIMbased vector register file, using foundry SRAM cells in 65 nm CMOS for efficient high-performance computing [18] .…”
Section: Trend 2: Cim Innovation From Circuits To Systemsmentioning
confidence: 99%
“…Moreover, researchers are collaborating and considering challenges from a systematic perspective to help CIM integrate into real computing systems. A DCIM-based neural visual-enhancement engine (NVE) is fabricated in the 3 nm process through the collaboration of MediaTek and TSMC [17] . Wang et al from the University of Texas at Austin present Vecim, a RISC-V vector co-processor integrated with a CIMbased vector register file, using foundry SRAM cells in 65 nm CMOS for efficient high-performance computing [18] .…”
Section: Trend 2: Cim Innovation From Circuits To Systemsmentioning
confidence: 99%