300 mm Diameter Hydrogen Annealed Silicon Wafers

Takeda, Ryuji; Xin, Ping; Yoshikawa, Jun; Kirino, Yoshio; Matsushita, Yasuo; Hosoki, Yoshinori; Tsuchiya, N.; Fujii, Osamu

doi:10.1149/1.1838009

Cited by 14 publications

(7 citation statements)

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“…Notice that similar problems of 300 mm wafer warpage have been reported in Ref. 19, where extremely high annealing temperatures and a symmetrical inner three-point support was used.…”

Section: Maximum Allowable Ramp Ratesupporting

confidence: 60%

Slip-free processing of 300 mm silicon batch wafers

Fischer

Richter

Kürner³

et al. 2000

Journal of Applied Physics

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Articles you may be interested inTheoretical calculation of the acoustic force on a patterned silicon wafer during megasonic cleaning Under gravitational and thermal constraints of integrated-circuit ͑IC͒ process technology, 300-mm-diam silicon wafers can deform via slip dislocation generation and propagation, degrading the electrical characteristics of the leading edge device. We present a force balance model to describe the strain relaxation in large wafer diameter, which includes heat transfer effects and the upper yield point of the silicon material. The material attributes, such as oxygen content and the state of oxygen aggregation, are taken into account. The theoretical approach allows the calculation of wafer mechanics and ramp rate profiles for an arbitrary high-temperature process. Plastic deformation of silicon wafers caused by thermal stresses at high temperatures can be controlled by process design. Deformation due to gravitational forces can be prevented through appropriate equipment design. The quantitative theory proposed here provides guidance for computer simulation to configure stable slip-free wafer process flow under mechanical and thermal loads. Applications include high speed simulation of ''what if?'' experiments, and initial simulations of large scale experimental sequences. The simulator developed can also be used by IC manufacturers to determine optimum wafer throughput and cycle times in front-end device processes.

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“…Notice that similar problems of 300 mm wafer warpage have been reported in Ref. 19, where extremely high annealing temperatures and a symmetrical inner three-point support was used.…”

Section: Maximum Allowable Ramp Ratesupporting

confidence: 60%

Slip-free processing of 300 mm silicon batch wafers

Fischer

Richter

Kürner³

et al. 2000

Journal of Applied Physics

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“…As the Si wafer increases in diameter to and larger than 300 mm, thermal and gravitational stresses greatly increase [1,2]. In some cases, these stresses cause Si wafers to deform [3] and/or get destroyed due to the damages introduced by cracks and dislocations.…”

Section: Introductionmentioning

confidence: 99%

TEM Observation of the Dislocations Nucleated from Cracks inside Lightly or Heavily Doped Czochralski Silicon Wafers

Shiba

Sueoka

2011

Advances in Condensed Matter Physics

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The crack propagation from the indent introduced with a Vickers hardness tester at room temperature and the dislocation nucleation from the cracks at 900°C inside lightly boron (B), heavily B, or heavily arsenic (As) doped Czochralski (CZ) Si wafers were investigated with transmission electron microscopy (TEM) observations. It was found that the dopant concentration and the dopant type did not significantly affect the crack propagation and the dislocation nucleation. The slip dislocations with a density of about (0.8∼2.8) × 1013/cm3were nucleated from the cracks propagated about 10 μm in depth. Furthermore, small dislocations that nucleated with very high density and without cracks were found around the indent introduced at 1000°C.

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“…A rough estimation from the hertzian contact theory gives a necessary radius of curvature >5000 mm for each pin contact to drop the total resolved shear stress below the upper yield stress at 1200 • C process temperature for 300 mm wafers. As these values are not practical for vertical ladder boats filled up with ∼100 wafers each one supported by three to four pins we focus on using planar support geometries, e.g., ring-like jigs [16,7] or plates. Especially, plate-like supports are of interest if wafers should be annealed with a very low upper yield stress (typically material with low oxygen or boron concentration or highly precipitated material) as the induced bending stress is quite low.…”

Section: Introductionmentioning

confidence: 99%