32nm Node USJ Implant &amp;#x00026; Annealing Options

Borland, John

doi:10.1109/rtp.2007.4383840

Cited by 5 publications

(2 citation statements)

References 7 publications

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“…All of these obstacles have resulted in adding millisecond annealing to the thermal roadmap. Millisecond annealing seemed like the obvious path especially because of decades of literature indicating the superior Rs and Xj characteristics to meet the activation demands with minimal diffusion (5). The demands that are imposed by scaling dimensions have resulted in reduction of peak temperature that can be used by conventional RTP processing.…”

Section: Introductionmentioning

confidence: 99%

(Invited) Advanced (Millisecond) Annealing in Silicon Based Semiconductor Manufacturing

et al. 2010

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Rapid thermal annealing has taken a new turn at the beginning of this century with the advent of term "advanced annealing". Although the annealing techniques are a few decades old, they have not seen many applications in the semiconductor industry until recently, primarily due to the complexity of the tools involved and their mechanical interaction with silicon wafers. The tolerance for dopant diffusion has reduced significantly from one ITRS node to next. Advanced anneals rely primarily on achieving super-high temperatures (>1100oC) in very short periods of time (milliseconds). These anneals provide the relevant thermal budget for dopant activation processes with minimal diffusion, thus making them attractive. However, as process integration has become more complex additional challenges are encountered by super-high temperature anneals at the recent technology nodes. Additionally, these annealing techniques impart severe mechanical stress on wafers by heating the wafers at rates >10^5 oC/s. This paper will focus on simulation and experimental verification of stress that is experienced by silicon wafers during a millisecond annealing process

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Section: Introductionmentioning

confidence: 99%

(Invited) Advanced (Millisecond) Annealing in Silicon Based Semiconductor Manufacturing

et al. 2010

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“…Performing the reference measurement at the center of a wafer, formula ͑6͒ can e.g., be used to determine the junction depth uniformity over a full wafer ͑e.g., using the powerful microuniformity mapping capabilities of TP 21,22 ͒. An example is shown in Fig.…”

Section: B Relative Determination Of Junction Depthsmentioning

confidence: 99%

Nondestructive extraction of junction depths of active doping profiles from photomodulated optical reflectance offset curves

Bogdanowicz

Dortu

Clarysse

et al. 2010

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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The ITRS Roadmap highlights the electrical characterization of the source and drain extension regions as a key challenge for future complimentary-metal-oxide-semiconductor technology. Presently, an accurate determination of the depth of ultrashallow junctions can routinely only be performed by time-consuming and destructive techniques such as secondary ion mass spectrometry ͑SIMS͒. In this work, the authors propose to use the fast and nondestructive photomodulated optical reflectance ͑PMOR͒ technique , as implemented in the Therma-Probe ® ͑TP͒ dopant metrology system, for these purposes. PMOR is a pump-probe technique based on the measurement of the pump-induced modulated change in probe reflectance, i.e., the so-called ͑photo͒ modulated reflectance. In this article, the authors demonstrate that the absolute junction depths of boxlike active dopant structures can be extracted in a very simple and straightforward way from the TP offset curves, which represent the behavior of the modulated reflectance as a function of the pump-probe beam spacing. Although the procedure is based on the insights into the physical behavior of the offset curves, no modeling is involved in the actual extraction process itself. The extracted junction depths are in good correlation with the corresponding junction depths as measured by means of SIMS. The technique has a subnanometer depth sensitivity for depths ranging from 10 to 35 nm with the present Therma-Probe ® 630XP system. The extension of the proposed procedure to the general ultrashallow profiles is also explored and discussed.

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Materials Processing

Schmidt¹,

Wetzig²

2012

Ion Beams in Materials Processing and Analysis

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32nm Node USJ Implant & Annealing Options

Cited by 5 publications

References 7 publications

(Invited) Advanced (Millisecond) Annealing in Silicon Based Semiconductor Manufacturing

(Invited) Advanced (Millisecond) Annealing in Silicon Based Semiconductor Manufacturing

Nondestructive extraction of junction depths of active doping profiles from photomodulated optical reflectance offset curves

Materials Processing

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