3D IC Memory BIST Controller Allocation for Test Time Minimization Under Power Constraints

Ko, Yen‐Chun; Huang, Shih-Hsu

doi:10.1109/ats.2017.56

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

3D IC Memory BIST Controller Allocation for Test Time Minimization Under Power Constraints

Cited by 4 publications

References 11 publications

An Efficient Grouping Algorithm with Build-in-Self-Test for Multiple Memories

An Efficient Grouping Algorithm with Build-in-Self-Test for Multiple Memories

Power-Aware Test Scheduling for Memory BIST

On Managing Test-Time, Power, and Layer Assignment in 3D SoCs with Built-In-Self-Repair Modules

Contact Info

Product

Resources

About