3D integration advances computing

Reda, Sherief

doi:10.1038/547038a

Cited by 13 publications

(14 citation statements)

References 8 publications

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“…Not only can this “so-called” rollable electronics (Rotronics) concept facilitate more efficient usage of space in electronic devices but it can also change the face of the computer-processing industry. Indeed, the continuous race toward developing smaller, faster, bigger, better, and more compact consumer electronics has given rise to supercompact 3D-ICs . In this regard, the 3D-IC provides a route to achieve a larger memory cell density within a much smaller spatial area.…”

Section: Resultsmentioning

confidence: 99%

“…This scheme obviously increases the production time and, therefore, reduces the scalability of the technology. Another limitation with respect to the traditional view of 3D-ICs is related to the low vertical connector density in the devices, which, in turn, significantly compromises the flow of electricity between adjacent layers and thereby the total data transfer volume. , Though the so-called “monolithic integration methodology” (in which additional circuits are deposited onto the previous ones) enables 1000 times more connector density, these integrated architectures still have their fair share of drawbacks in terms of flexibility, production costs, and packing density. , Here, we have set forth some general guidelines in the field for addressing the above-mentioned challenges through a simple and conventional lithographic device-manufacturing scheme onto a rollable lapolose-based paper. To that end, we have demonstrated that the resistance remains the same for the manufactured Rotronic devices during flexing with a slight increase at around 5% after being bent to 150° and 20% after consecutive folds.…”

Section: Discussionmentioning

confidence: 99%

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Flexible and Green Electronics Manufactured by Origami Folding of Nanosilicate-Reinforced Cellulose Paper

Kadumudi

Trifol

Jahanshahi

et al. 2020

ACS Appl. Mater. Interfaces

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Today's consumer electronics are made from nonrenewable and toxic components. They are also rigid, bulky, and manufactured in an energy-inefficient manner via CO 2 -generating routes. Though petroleum-based polymers such as polyethylene terephthalate and polyethylene naphthalate can address the rigidity issue, they have a large carbon footprint and generate harmful waste. Scalable routes for manufacturing electronics that are both flexible and ecofriendly (Fleco) could address the challenges in the field. Ideally, such substrates must incorporate into electronics without compromising device performance. In this work, we demonstrate that a new type of wood-based [nanocellulose (NC)] material made via nanosilicate (NS) reinforcement can yield flexible electronics that can bend and roll without loss of electrical function. Specifically, the NSs interact electrostatically with NC to reinforce thermal and mechanical properties. For instance, films containing 34 wt % of NS displayed an increased young's modulus (1.5 times), thermal stability (290 → 310 °C), and a low coefficient of thermal expansion (40 ppm/K). These films can also easily be separated and renewed into new devices through simple and low-energy processes. Moreover, we used very cheap and environmentally friendly NC from American Value Added Pulping (AVAP) technology, American Process, and therefore, the manufacturing cost of our NS-reinforced NC paper is much cheaper ($0.016 per dm −2 ) than that of conventional NC-based substrates. Looking forward, the methodology highlighted herein is highly attractive as it can unlock the secrets of Fleco electronics and transform otherwise bulky, rigid, and "difficult-to-process" rigid circuits into more aesthetic and flexible ones while simultaneously bringing relief to an already-overburdened ecosystem.

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Section: Resultsmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Flexible and Green Electronics Manufactured by Origami Folding of Nanosilicate-Reinforced Cellulose Paper

Kadumudi

Trifol

Jahanshahi

et al. 2020

ACS Appl. Mater. Interfaces

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show abstract

“…Furthermore, logic functions such as inverter, NOR, and NAND are demonstrated using top-gated IGZO VFETs on a 2 inch wafer [87], as shown in Figure 5(a) (right). Despite conventional scalable method by fabricating more parallel devices, the vertical transistors can be integrated in the vertical direction by stacking different devices layer by layer, representing the device-level 3D integration [100,101]. This kind of vertical stacking of unit devices does not consume additional space besides what is needed for a single device at the bottom [75,102].…”

Section: Scalability and 3d Integrationmentioning

confidence: 99%

Graphene-based vertical thin film transistors

Liu

Duan

2020

Sci. China Inf. Sci.

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Vertical field effect transistors (VFETs), where the channel material is sandwiched between source-drain electrodes and the channel length is simply determined by its body thickness, have attracted considerable interest for high performance electronics owning to their intrinsic short channel length. To enable the effective gate modulation and current switching behavior, the electrode of conventional VFET is largely based on perforated metals, in which the gate electrical field could penetrate through. Recently, with the emerge of graphene, a new type of graphene based VFETs has been developed. With finite density of states and the weak electrostatic screening effect, graphene exhibits a field-tunable work-function and partial electrostatic transparency, it can thus function as an "active" contact with tunable graphene-channel junction, enabling entirely new transistor functions or higher device performance not previously possible. In this review, we discuss the research progresses of graphene-based VFET, including the its basic device structure, carrier transport mechanism, device performance and novel properties demonstrated.

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“…By stacking microelectromechanical units or integrated circuit units on top of each other and using vertical interconnections between the units, micro-systems can achieve high levels of function and system integration. In addition, micro-systems with 3D integration technology have the advantages of short interconnection circuits, small parasitic capacitance, and inductance [3][4][5][6]. This technology allows membranes or microstructures to be directly fabricated on the handle wafer and for integrated circuits to be fabricated on another wafer, respectively; after that, the wafers are bonded together and are interconnected by 3D integration.…”

Section: Introductionmentioning

confidence: 99%

Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding

et al. 2021

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Three-dimensional integration technology provides a promising total solution that can be used to achieve system-level integration with high function density and low cost. In this study, a wafer-level 3D integration technology using PDAP as an intermediate bonding polymer was applied effectively for integration with an SOI wafer and dummy a CMOS wafer. The influences of the procedure parameters on the adhesive bonding effects were determined by Si–Glass adhesive bonding tests. It was found that the bonding pressure, pre-curing conditions, spin coating conditions, and cleanliness have a significant influence on the bonding results. The optimal procedure parameters for PDAP adhesive bonding were obtained through analysis and comparison. The 3D integration tests were conducted according to these optimal parameters. In the tests, process optimization was focused on Si handle-layer etching, PDAP layer etching, and Au pillar electroplating. After that, the optimal process conditions for the 3D integration process were achieved. The 3D integration applications of the micro-bolometer array and the micro-bridge resistor array were presented. It was confirmed that 3D integration based on PDAP adhesive bonding is suitable for the fabrication of system-on-chip when using MEMS and IC integration and that it is especially useful for the fabrication of low-cost suspended-microstructure on-CMOS-chip systems.

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3D integration advances computing

Cited by 13 publications

References 8 publications

Flexible and Green Electronics Manufactured by Origami Folding of Nanosilicate-Reinforced Cellulose Paper

Flexible and Green Electronics Manufactured by Origami Folding of Nanosilicate-Reinforced Cellulose Paper

Graphene-based vertical thin film transistors

Wafer-Level 3D Integration Based on Poly (Diallyl Phthalate) Adhesive Bonding

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