3d Self-Aligned Fabrication of Suspended Nanowires by Crystallographic Nanolithography

Abstract

Known templating procedures mostly create out-ofplane nanowires where individual connections at both ends are complicated. Here we introduce a templating procedure for wafer scale fabrication of in-plane nanowires. The template fabrication process employs two simple interference lithography masking patterns and relies on self-aligned crystallographic processing. In-plane nanowires with diameters down to 10 nm can be fabricated wafer scale through this 3D templating procedure. As a first demonstration arrays of suspended silicon nitride wires have been created.