4-Dimensional Design Analysis and Optimization of System-in-Package

Abstract

This paper is an overview of applications of CAE (computer-aided-engineering) in design for package and board level reliability of System-in-Package (SiP). CAE is an efficient tool for virtual prototyping of complex SiP to save the development time and cost with understanding on the physics of failures. The paper highlights on five major reliability issues frequently encountered in the development of SiP, such as thermo-mechanical related package failures, matrix package warpage, moisture-induced package failures, board level solder joint reliability under thermal cycling test and drop test. For each individual topic, introduction, brief theory, and an example of application with correlation to experiment are given.

System integration for miniature node of wireless sensor network (WSN)

“…SiP technology has outstanding advantages, for example, strong function, small size, short development cycle, high applicability and so on, which can satisfy the demand of multifunction, miniaturization and low cost [ 2 ]. In recent years SiP technology had been paid great attention in the world.…”