52‐1: <i>Invited Paper:</i> Technical Progress of OLED Displays for Premium TVs

Shin, Hong-Jae; Choi, Soo-Hong; Hong, Sa Suk; Lee, Chang‐Hoon; Oh, Du-Hwan; Bae, So Young; Kim, Tae-Shick; Song, Hong-Sung; Kim, Han-Seop; Oh, Chang‐Ho

doi:10.1002/sdtp.15578

Cited by 10 publications

(7 citation statements)

References 14 publications

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“…However, a reliable p-type ZnO has not yet been reported [25]. Nonetheless, in the case of IGZO (a mixture of In 2 O 3 , Ga 2 O 3 , and ZnO), although it exhibits n-type characteristics, it is commercially utilized as the channel layer of the thin film transistor (TFT) in large organic light-emitting devices, due to its reliability under operating voltage and current conditions [26,27].…”

Section: Introductionmentioning

confidence: 99%

Enhanced Conversion Efficiency in MAPbI3 Perovskite Solar Cells through Parameters Optimization via SCAPS-1D Simulation

Son,

Jeong

2024

Applied Sciences

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In this study, various factors affecting the efficiency of the MAPbI3 perovskite solar cell (PSC) were analyzed using the SCAPS-1D simulation program. The basic device analyzed in this study had a structure of ITO/TiO2/MAPbI3/Cu2O/Au. The thickness of each layer (electron transport layer (ETL), perovskite absorption layer (PAL), and hole transport layer (HTL)), PAL defect density and interface defect density were investigated as parameters. The optimized parameters that yielded the highest light conversion efficiency were an ETL (TiO2) thickness of 100 nm, a PAL (MAPbI3) thickness of 1300 nm, an HTL (Cu2O) thickness of 400 nm, a PAL defect density of 1014 cm−3, and an interface defect density of 1013 cm−3 for both absorber/ETL and absorber/HTL interfaces. The optimized PSC exhibited a maximum efficiency of 19.30%. These results obtained in this study are expected to contribute considerably to the optimization and efficiency improvement of perovskite solar cells using inorganic charge-carrier transport layers.

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Section: Introductionmentioning

confidence: 99%

Enhanced Conversion Efficiency in MAPbI3 Perovskite Solar Cells through Parameters Optimization via SCAPS-1D Simulation

Son,

Jeong

2024

Applied Sciences

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“…This has inspired the development of backplane technologies such as low-temperature polysilicon (LTPS), an oxide semiconductor (OS), and low-temperature polycrystalline oxide (LTPO), which supersede hydrogenated amorphous silicon (a-Si: H) and offer higher on-state current. [1][2][3] OSs, distinguished by an extremely low off-state current 4 and higher carrier mobility compared with a-Si:H, are under active development. OSs can be uniformly sputterdeposited through a low-temperature process, making them suitable for a range of product sizes.…”

Section: Introductionmentioning

confidence: 99%

Vertical field‐effect transistor using c‐axis aligned crystal indium–gallium–zinc oxide on glass substrate and prototype organic light‐emitting diode display

Nakada,

Shima,

Jincho

et al. 2024

J Soc Info Display

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This study developed a technology for a vertical field‐effect transistor (VFET) incorporating c‐axis aligned crystal oxide semiconductor on a Gen 3.5 glass substrate. VFETs, with a channel length of 0.5 μm, demonstrated stable characteristics with minimal variation, higher on‐state current compared with low‐temperature polysilicon FETs, and extremely low off‐state leakage current. A prototype 513‐ppi organic light‐emitting diode display that features a red, green, and blue stripe arrangement and includes an internal compensation circuit with a configuration of six transistors and two capacitors was fabricated by harnessing the advantageous features of VFETs. Such a display was previously unattainable with planar FETs. Thus, the developed VFET technology presents a viable pathway for achieving ultrahigh‐resolution panels on glass substrates.

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“…Although AMOLED displays adopt a similar scanning way to active matrix liquid crystal displays (AMLCDs) by means of source and gate driver circuits, they require additional schemes to compensate for variations on thin-film transistor (TFT), supply voltage, and organic light-emitting diode (OLED) that cause observable artifacts, such as Mura, non-uniformity, and image-sticking. Consequently, many compensation techniques including current programming, voltage programming, digital programming, and external compensation are reported [8], [9], [10], [11], [12]. While voltage programming circuits are widely employed in small and medium-sized applications, the external compensation schemes are adopted in large-sized displays that suffer from supply voltage variation and need a long operational lifetime.…”

Section: Introductionmentioning

confidence: 99%

Fine-Tunable Emission Pulse Generation Circuit Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays

Chang

Kim

Nam

2023

IEEE Trans. Electron Devices

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Active matrix organic light-emitting diode (AMOLED) displays have deployed the compensation techniques to cope with the luminance non-uniformity issues caused by variations on electrical characteristics of thin-film transistors (TFTs). While some compensation circuits require control signals of longer pulse widths than a line time, the luminance control as well as the higher bit depth representation have been also accomplished by adjusting the pulse widths. A proposed EM pulse generation circuit consists of 11 p-type low-temperature poly-Si (LTPS) TFTs and a one coupling capacitor. While previous tunable circuits could address pulse widths of either even or odd multiples of a line time, the proposed circuit can generate any multiples by changing phases of additional clock signals. In particular, the internal inverter is implemented with a load connected to the output of a previous stage's inverter to reduce the power consumption over pulse widths. The coupling capacitor is also connected between two adjacent stages through one TFT, eliminating coupling noises on the output pulses. The proposed EM circuit is simulated at a line time of 3.8 µs for a 120 Hz 3840 × 2160 display. The results ensure that pulse widths from three to 2160 lines are generated successfully without coupling noises and the small variation on power consumption from 1.23 to 0.33 mW is achieved at 30 stages for the whole range of pulse widths, compared to the large range from 1.26 to 76.91 mW with the inverter of a diodeconnected load.

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52‐1: Invited Paper: Technical Progress of OLED Displays for Premium TVs

Cited by 10 publications

References 14 publications

Enhanced Conversion Efficiency in MAPbI3 Perovskite Solar Cells through Parameters Optimization via SCAPS-1D Simulation

Enhanced Conversion Efficiency in MAPbI3 Perovskite Solar Cells through Parameters Optimization via SCAPS-1D Simulation

Vertical field‐effect transistor using c‐axis aligned crystal indium–gallium–zinc oxide on glass substrate and prototype organic light‐emitting diode display

Fine-Tunable Emission Pulse Generation Circuit Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays

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