60-3:Distinguished Paper: Oxide Vertical TFTs for the Application to the Ultra High Resolution Display

Abstract

The ultra-high resolution display is in demand as virtual reality (VA) and augmented reality (AR) displays, and hologram display become much more important. We present vertical TFTs for the application to the driving TFT of ultra-high resolution display. The IGZO deposited by sputtering and InO x deposited by means of plasma-enhanced atomic layer deposition (PEALD) have been adopted as the channel layers. While the IGZO vertical TFT shows on-current of 0.23 mA at V g = 5 V and V ds = 2.1 V, that of InO x TFT shows 1.26 mA at the same driving condition. Author KeywordsVertical oxide TFT; Ultra high resolution display; PEALD InO x Objective and BackgroundThe recent trend in display may be listed as large SHV TV, AMOLED TV, high resolution mobile display, and new display with novel design or function such as flexible transparent display. Very recently high resolution displays become one of the big concerns 1 as virtual reality or augmented reality displays began to penetrate into the real market and hologram display is being developed. The display with resolution higher than 2000 ppi is considered to be achieved as ultra-high resolution displays. The most important factor in the ultra-high resolution display is the pixel area and the smallest TFT size would be the first criteria in the TFT point of view. The back channel etch (BCE) TFT 2 and self-aligned (SA) TFT 3 have been used for driving high resolution LCD and OLED, respectively. The comparison of foot print of TFT in Figure 1, however, shows that vertical TFT has the smallest pixel pitch value. In addition, vertical TFT can have precisely controlled short channel length defined by not the lithography instrument but the thin film thickness of spacer, resulting in high and uniform oncurrent. The paradoxical advantage of vertical TFT would be increasing channel length longer than the sub-pixel length. This would be the most important advantage of vertical TFT for the application to the high resolution display since properly designed vertical TFT allows high current gain at proper driving voltage which be decided from the threshold voltage of LCD or OLED device. Among the TFTs, oxide TFTs have been intensively researched due to the stellar performances of mobility and stability, large area uniformity, and use of existing facility 4-5 . Furthermore, architecture, materials, and process for the oxide TFT can be carefully selected depending on the device application. One of the most beautiful advantages of oxide TFT would be that it does not show short channel effect even with the channel length shorter than sub-micrometer 6-7 . This makes oxide semiconductors very suitable for the channel material of vertical TFT. Furthermore, considering the main issue in the vertical TFT, step coverage of active layer, oxide TFT would be the best selection since oxide semiconductor and gate insulator of alumina 8 or SiO 2 9 used for the oxide TFT can be deposited by means of plasma-enhanced atomic layer deposition (PEALD). PEALD provides excellent step coverage of films wi...

A threshold voltage and drain current model for symmetric dual-gate amorphous InGaZnO thin film transistors

“…Amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) are becoming preference for high-quality and large-size display applications, for their reasonably high electron mobility (>10 cm 2 • V −1 • s −1 ) even though fabricated at room temperature [1], good device uniformity, and relatively low fabrication costs [2]. Moreover, the high optical transmittance and flexibility of a-IGZO films have enabled various novel electronic applications based on a-IGZO TFTs, such as flexible transparent displays [3], virtual reality displays [4], transparent RFID logic chips [5], and wearable electronics [6]. However, the electrical stability, especially bias stability under illumination evaluated mainly by threshold voltage shifts turns out to be a great concern [7][8][9].…”

The new route for realization of 1‐μm‐pixel‐pitch high‐resolution displays

“…The requirement for narrow‐pitch pixel integration is contrary to a stable driving condition. The vertical oxide TFT with a very small footprint was reported as one of the solutions . However, further in‐depth studies are required to optimize the device performance and reliability.…”

“…The vertical oxide TFT with a very small footprint was reported as one of the solutions. [14][15][16][17] However, further in-depth studies are required to optimize the device performance and reliability. In this paper, we report a new pixel architecture for 1-μm-pitch pixel realization to integrate all the main components without the drawbacks of an RC-delay and a switching operation.…”

46‐2: Invited Paper: Ultimate Resolution Active Matrix Display with Oxide TFT Backplanes for Electronic Holographic Display

“…In that case, straight scaling down of pattern pitch and channel length of switching TFTs is not practical and requests very expensive equipments and processes. Instead of scaling down channel length of BCE type oxide TFTs, oxide TFTs with vertical channel was proposed [6]. The required area of vertical channel oxide TFTs is much smaller than that of BCE type oxide TFTs.…”