7-Bit Multilayer True-Time Delay up to 1016ps for Wideband Phased Array Antenna

Abstract

We present a seven-bit multilayer true-time delay (TTD) circuit operating from 1 to 7 GHz for wideband phased array antennas. By stacking advanced substrates with low dielectric loss, the TTD with PCB process is miniaturized and has low insertion loss. The signal vias with surrounding ground vias are designed to provide impedance matching throughout the band, allowing the overall group delay to be flat. The standard deviation of the TTD for all states is below 19 ps, which is 1.87% of the maximum group delay. The maximum delay is 1016 ps with resolution of 8 ps. The implemented TTD is 36.6 × 19.4 mm 2 and consumes 0.65 mW at 3.3 V supply for all the delay states. The measured input/output return loss is better than 12.1 dB for the band of 1-7 GHz.

A Wideband True Time Delay Circuit Using 0.25 µm GaN HEMT Technology

“…However, the characteristic impedance is changed when the capacitance is varied, resulting in a high variation in the return losses depending on the capacitances of the varactors. Most true time delays have been realized using an SPDT switch and an artificial time delay with GaAs or MEMS (Micro Electromechanical System) switches, as shown in Figure 1 b [ 9 , 10 , 11 , 12 , 13 ]. Since a conventional true time delay requires many SPDT switches and inductors, which results in a high insertion loss and large chip size, the number of switches and the size of inductors should be reduced.…”