2020
DOI: 10.1109/tcsii.2019.2933723
|View full text |Cite
|
Sign up to set email alerts
|

7 TOPS/W Cellular Neural Network Processor Core for Intelligent Internet-of-Things

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2020
2020
2023
2023

Publication Types

Select...
2
2

Relationship

0
4

Authors

Journals

citations
Cited by 4 publications
(1 citation statement)
references
References 14 publications
0
1
0
Order By: Relevance
“…Traditionally, cellular neural network topologies have been implemented in VLSI technology, particularly for image processing in early 90s [40] and more recently for real-time signal processing at high precision in <ms/frame in applications such as integrated sensing, autonomous vehicles, and mobile robots. [41][42][43] Recently, few papers have explored the implementation of such cellular topologies using nonvolatile memory devices which promise better performance and energy consumption. [44,45] A hybrid CMOS/memristor implementation was proposed for a standard cellular processing unit where the memristor matrix performs the weight-and-sum operation in the analog domain.…”
Section: Discussionmentioning
confidence: 99%
“…Traditionally, cellular neural network topologies have been implemented in VLSI technology, particularly for image processing in early 90s [40] and more recently for real-time signal processing at high precision in <ms/frame in applications such as integrated sensing, autonomous vehicles, and mobile robots. [41][42][43] Recently, few papers have explored the implementation of such cellular topologies using nonvolatile memory devices which promise better performance and energy consumption. [44,45] A hybrid CMOS/memristor implementation was proposed for a standard cellular processing unit where the memristor matrix performs the weight-and-sum operation in the analog domain.…”
Section: Discussionmentioning
confidence: 99%