9.1 A self-calibrating NFC SoC with a triple-mode reconfigurable PLL and a single-path PICC-PCD receiver in 0.11&amp;#x03BC;m CMOS

Lien, Wee Liang; Choke, Tieng Ying; Tan, Ying Chow; Kong, Ming; Low, Eng Chuan; Li, Dan Ping; Jin, Liming; Zhang, Huajiang; Leow, Chin Heng; Chew, Soong Lin; Dasgupta, Uday; Yong, Chee Hong; Gao, Tian; Ong, G. T.; Tan, Wee Guan; Shu, Weimin; Heng, Chee Lee; Shanaa, Osama

doi:10.1109/isscc.2014.6757380

Cited by 9 publications

(3 citation statements)

References 2 publications

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“…The analog part of this work consumes 54% less power in comparison with the immediate contemporary design [ 3 ]. The works [ 4 , 71 ] also present state-of-the-art NFC systems, but they are not exactly comparable to this work, as they involve more complex circuit applications.…”

Section: Measurement Results and Discussionmentioning

confidence: 99%

“…From 2000 onwards, based on the existing RFID standards, a new set of communication protocols known as NFC or near field communication was introduced. Unlike RFID, NFC uses only the frequency range of

, and practically it is only functional over a distance less than

[ 3 , 4 ]. Also, NFC enables a peer-to-peer (P2P) communication between a smart device and an NFC capable tag which is not possible with the RFID technology.…”

Section: Introductionmentioning

confidence: 99%

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An Ultra-Low-Power RFID/NFC Frontend IC Using 0.18 μm CMOS Technology for Passive Tag Applications

Bhattacharyya

Gruenwald

Jansen

et al. 2018

Sensors

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Battery-less passive sensor tags based on RFID or NFC technology have achieved much popularity in recent times. Passive tags are widely used for various applications like inventory control or in biotelemetry. In this paper, we present a new RFID/NFC frontend IC (integrated circuit) for 13.56 MHz passive tag applications. The design of the frontend IC is compatible with the standard ISO 15693/NFC 5. The paper discusses the analog design part in details with a brief overview of the digital interface and some of the critical measured parameters. A novel approach is adopted for the demodulator design, to demodulate the 10% ASK (amplitude shift keying) signal. The demodulator circuit consists of a comparator designed with a preset offset voltage. The comparator circuit design is discussed in detail. The power consumption of the bandgap reference circuit is used as the load for the envelope detection of the ASK modulated signal. The sub-threshold operation and low-supply-voltage are used extensively in the analog design—to keep the power consumption low. The IC was fabricated using 0.18 μm CMOS technology in a die area of 1.5 mm × 1.5 mm and an effective area of 0.7 normalmm2. The minimum supply voltage desired is 1.2 V, for which the total power consumption is 107 μW. The analog part of the design consumes only 36 μW, which is low in comparison to other contemporary passive tags ICs. Eventually, a passive tag is developed using the frontend IC, a microcontroller, a temperature and a pressure sensor. A smart NFC device is used to readout the sensor data from the tag employing an Android-based application software. The measurement results demonstrate the full passive operational capability. The IC is suitable for low-power and low-cost industrial or biomedical battery-less sensor applications. A figure-of-merit (FOM) is proposed in this paper which is taken as a reference for comparison with other related state-of-the-art researches.

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Section: Measurement Results and Discussionmentioning

confidence: 99%

, and practically it is only functional over a distance less than

[ 3 , 4 ]. Also, NFC enables a peer-to-peer (P2P) communication between a smart device and an NFC capable tag which is not possible with the RFID technology.…”

Section: Introductionmentioning

confidence: 99%

An Ultra-Low-Power RFID/NFC Frontend IC Using 0.18 μm CMOS Technology for Passive Tag Applications

Bhattacharyya

Gruenwald

Jansen

et al. 2018

Sensors

View full text Add to dashboard Cite

show abstract

“…A few exciting industrial demos highlighted the latest technology advancement: Intel's Haswell IA 22-nm processors [1], [2] for PCs and servers and the Ivytown 22-nm Xeon processor [3] for high-performance computing, Microsoft's three-dimensional (3-D) depth camera in Kinect for Xbox One [4], and MediaTek's self-calibrating near-field communication (NFC) system on a chip (SoC) for the "tap and go" operation [5]. In addition, two 3-D gesture-sensing and recognition systems were presented, by Princeton University [6] and the University of California (UC), Berkeley and Davis [7], to substantially enrich the user experience.…”

mentioning

confidence: 99%

2014 ISSC Demonstration Session Summary: 14/12 Mix of Industry/Academia Papers Offers Something for Everyone [Conference Reports]

Ko¹

2014

IEEE Solid-State Circuits Mag.

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Low-Complexity Biosignal Compression Using Compressed Sensing

Mangia

Pareschi

Cambareri

et al. 2017

Adapted Compressed Sensing for Effective Hardware Implementations

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9.1 A self-calibrating NFC SoC with a triple-mode reconfigurable PLL and a single-path PICC-PCD receiver in 0.11μm CMOS

Cited by 9 publications

References 2 publications

An Ultra-Low-Power RFID/NFC Frontend IC Using 0.18 μm CMOS Technology for Passive Tag Applications

An Ultra-Low-Power RFID/NFC Frontend IC Using 0.18 μm CMOS Technology for Passive Tag Applications

2014 ISSC Demonstration Session Summary: 14/12 Mix of Industry/Academia Papers Offers Something for Everyone [Conference Reports]

Low-Complexity Biosignal Compression Using Compressed Sensing

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