2021
DOI: 10.1002/sdtp.14621
|View full text |Cite
|
Sign up to set email alerts
|

9‐4: Fabrication of Oxide‐Semiconductor FETs with Submicron Channel Length

Abstract: This work presents oxide‐semiconductor FETs with submicron channel length (L) below the resolution limit of the exposure system used in their fabrication on glass substrates. The improved patterning method proposed here enables FET fabrication with L = 0.7 μm and small variation in the characteristics, leading to high on‐state current.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4

Citation Types

0
4
0

Year Published

2022
2022
2024
2024

Publication Types

Select...
3

Relationship

1
2

Authors

Journals

citations
Cited by 3 publications
(4 citation statements)
references
References 14 publications
0
4
0
Order By: Relevance
“…However, the structural and fabrication limitations of FETs present obstacles to achieving stable L and on-state characteristics. 8 As a proposed solution, LTPO, which combines the high mobility and reliability of LTPS with the low off-state current of OS, has been employed to realize high luminance, fast driving, and low power consumption 9 and has already been applied commercially. Nevertheless, it has drawbacks, including a complex fabrication process, a large number of fabrication steps, and high fabrication costs.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…However, the structural and fabrication limitations of FETs present obstacles to achieving stable L and on-state characteristics. 8 As a proposed solution, LTPO, which combines the high mobility and reliability of LTPS with the low off-state current of OS, has been employed to realize high luminance, fast driving, and low power consumption 9 and has already been applied commercially. Nevertheless, it has drawbacks, including a complex fabrication process, a large number of fabrication steps, and high fabrication costs.…”
Section: Introductionmentioning
confidence: 99%
“…Various strategies have been explored to increase on‐state current, such as shortening the channel length ( L ) of FETs. However, the structural and fabrication limitations of FETs present obstacles to achieving stable L and on‐state characteristics 8 . As a proposed solution, LTPO, which combines the high mobility and reliability of LTPS with the low off‐state current of OS, has been employed to realize high luminance, fast driving, and low power consumption 9 and has already been applied commercially.…”
Section: Introductionmentioning
confidence: 99%
“…However, such high-mobility materials still have problems, such as normally-on characteristics and low reliability, especially variations in negative bias temperature illumination stress (NBTIS) tests [57]. There is an approach for increasing on-state current by shortening the channel length (L) of field-effect transistors (FETs); however, the problems of the FET structure and manufacturing equipment have caused obstacles with regard to stably obtaining on-state characteristics [8]. LTPO, which has the advantages of high mobility and reliability of LTPS and a low off-state current of OS, has been proposed as a solution [9] and has been already used in commercial products.…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, the novel techniques to scale LCH down in large area electronics should be explored. Imprint lithography [6], twostep double patterning [7], and vertical TFT structures [8] can be candidates for such. It is still, however, very elusive to accomplish high performance, high uniformity and large area processibility, simultaneously.…”
Section: Introductionmentioning
confidence: 99%