2022
DOI: 10.1109/jssc.2022.3184531
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A 0.033-mm2 21.5-aF to 114.9-aF Resolution Continuous-Time Δ Σ Capacitance-to-Digital Converter Achieving Parasitic Capacitance Immunity Up to 480 pF

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Cited by 8 publications
(1 citation statement)
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“…Successive approximation register (SAR)-based capacitance-to-digital converters are well known for their excellent energy efficiency, but linearity and resolution are limited by mismatch [1]. Continuous-time (CT) sigma-delta (ΣΔ) ADCs, instead, provide a remarkable dynamic range (DR) at the cost of large area requirements and power-hungry analog subsystems; this class of ADCs can achieve high resolution thanks to oversampling and noise shaping [2], [3]. The zoom architecture combines the advantages of SAR and ΣΔ ADCs (a good trade-off between resolution and energy dissipated per conversion step), but common drawbacks are the area occupation and linearity issues in the case of multibit DACs [4].…”
Section: Introductionmentioning
confidence: 99%
“…Successive approximation register (SAR)-based capacitance-to-digital converters are well known for their excellent energy efficiency, but linearity and resolution are limited by mismatch [1]. Continuous-time (CT) sigma-delta (ΣΔ) ADCs, instead, provide a remarkable dynamic range (DR) at the cost of large area requirements and power-hungry analog subsystems; this class of ADCs can achieve high resolution thanks to oversampling and noise shaping [2], [3]. The zoom architecture combines the advantages of SAR and ΣΔ ADCs (a good trade-off between resolution and energy dissipated per conversion step), but common drawbacks are the area occupation and linearity issues in the case of multibit DACs [4].…”
Section: Introductionmentioning
confidence: 99%