A 0.13-µm CMOS multi-band WCDMA/HSDPA receiver adopting silicon area reducing techniques

A 0.1–5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS

“…However, these inductors have different quality factor. The nested inductor structure [18] consists of outer and inner diameter inductors. But it features poor isolation between them.…”

“…, extensive analysis of the proposed circuit yields: where g m2 is the transconductance of the output stage, R 1 and R 2 are the output resistance of the input and output stages, respectively, C L is the load of the Op-Amp, and R F ≈R C is assumed. From (16) and (18), as capacitor C C equals C F , the dominant zero is lower than the dominant pole, which boosts dc gain starting at the corner frequency…”