A 0.45–1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS

Fully-integrated switched-capacitor voltage regulator with on-chip current-sensing and workload optimization in 32nm SOI CMOS

“…We also implemented a baseline switched-capacitor voltage regulation scheme that performs pulse frequency modulation [10,13] for comparison. Regulator efficiency, voltage droop against load transients, and steady-state ripple across 10X range of load currents will be reported in this section.…”

“…Starting from the single-phase SC converter optimized in Section II, multiple-phase interleaving was adopted to reduce the inherent output voltage ripple and enhance response time [7,10,13]. The clock signals of multiple converter phases were driven by a 17-phase voltage-controlled oscillator (VCO), whose frequency is controlled by current-starved footers and headers.…”

“…Compared to buck converters with high-quality off-chip or package-integrated inductors [3][4] providing high efficiency across a wide output voltage range, on-chip buck converters [5][6] still suffer low efficiency and low current density due to low-quality and bulky inductors. Fully-integrated switchedcapacitor converters [7][8][9][10][11][12][13][14][15] offer high efficiencies at integer step-down conversion ratios, and high current density could be achieved using high-density on-chip capacitors [10][11][12][13]. Still, maintaining high efficiency of switched-capacitor converters amidst significant workload fluctuations is a challenging task since multiple design parameters such as switching frequency and switch widths need to be dynamically adapted in a fast manner to minimize loss corresponding to load current change.…”

“…Literature on the voltage regulation of switched-capacitor converters has primarily focused on output voltage comparison against reference voltage [7][8][9][10][11][12][13][14][15]. The approaches that attempted to optimize both switching frequency and width (or phase partition) either required several reference voltages to make a two-dimensional decision [8,14], or was handicapped by the amount of tuning capability per clock period [9].…”

“…We focus on a 2:1 SC voltage converter design throughout this paper, but the proposed current-sensing-based workload optimization technique can be applied to other integer voltage conversion ratios [7,8,13]. On the other hand, recently proposed fine-grain SC voltage converters employed only 2:1 converters in successive approximation [14] or in a recursive manner [15], which makes the design optimization of 2:1 SC converter design optimization particularly relevant.…”