A 0.5 V low-voltage low-dropout regulator

A Very Low-Dropout Voltage Regulator in 0.18-M Cmos Technology for Power Management System

“…Many types of LDO regulators have been proposed and developed by previous researchers to enhance the performance of the LDO regulators [5,11,12,13,14,15,16]. One of the most important parameters in designing the LDO regulator is the low dropout voltage [12].…”

“…Many techniques have been employed to obtain low dropout voltage such as double recycle folded cascade, bulk modulation and zero temperature coefficient compensated by MOS transistor and etc. were proposed [5,12,14,15]. However, high dropout voltage was obtained.…”

“…However, high dropout voltage was obtained. A folded cascode operational amplifier were proposed as an error amplifier which provide high gain and high output impedance [11,12,13,14,15,16,17]. The folded cascode structure has high efficiency of 120 mV drop out voltage was achieved by using active resistor feedback circuit which required additional circuit for transient enhancement [17].…”

“…The folded cascode structure has high efficiency of 120 mV drop out voltage was achieved by using active resistor feedback circuit which required additional circuit for transient enhancement [17]. Heavy load boosting and slew rate enhancement circuits were also adopted in LDO regulators to reduce drop out and enhance slew rate, respectively [14,15]. In past, the proposed LDO required compensation circuit in order to meet the performance improvement [13,14,15,16,17].…”

“…Heavy load boosting and slew rate enhancement circuits were also adopted in LDO regulators to reduce drop out and enhance slew rate, respectively [14,15]. In past, the proposed LDO required compensation circuit in order to meet the performance improvement [13,14,15,16,17]. Nevertheless, extra circuit on designing LDO increases the complexity of circuitry, high power consumption and large silicon area which are not suitable for SoC.…”