A 0.8 μm BiCMOS technology for mixed analog-digital applications with complementary bipolar transistors

Investigations into realization of high precision ratioed resistors in standard CMOS and BiCMOS processes have been carried out. The results indicate that the layout of the resistors can be optimized with respect to area and matching requirements to yield relative accuracy better than 0.25%. Using an intermeshed ladder architecture, fast converters with resolution up to 10 b are realizable without trimming

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A 0.8 μm BiCMOS technology for mixed analog-digital applications with complementary bipolar transistors

Cited by 2 publications

References 1 publication

BiCMOS process integration and device optimization: Basic concepts and new trends

BiCMOS process integration and device optimization: Basic concepts and new trends

Trimless high precision ratioed resistors in D/A and A/D converters

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