A 0.9-2.2 GHz monolithic quadrature mixer oscillator for direct-conversion satellite receivers

Tang, J. van der; Kasperkovitz, D.

doi:10.1109/isscc.1997.585273

Cited by 40 publications

(19 citation statements)

References 4 publications

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“…Transconductance g,,,, from Figure 6.10 is implemented with a differential pair, whereas gma is realized with a cross-coupled differential pair. In an 11 GHz fT BiCMOS process, this implementation easily achieves an oscillation frequency ranging from 0.9 to 2.2 GHz (with C omitted: the integration capacitance only consists of device parasitics and interconnect) [229]. For this particular design the transistors that implemented gm, were four times larger sized than the transistors which implemented g,,,a.…”

Section: Two-integrator Oscillator Circuit Examplementioning

confidence: 98%

“…The minimum number of stages for a ring oscillators is two. An example of a two-stage ring oscillator is the twointegrator oscillator 6 [229]. Like any even-stage (N = 2,4 , ... )ring oscillator, a two-stage ring oscillator provides quadrature signals.…”

Section: Classificationmentioning

confidence: 99%

“…A bipolar circuit implementation of a two-integrator oscillator is presented in Figure 6.12 [229]. Transconductance g,,,, from Figure 6.10 is implemented with a differential pair, whereas gma is realized with a cross-coupled differential pair.…”

Section: Two-integrator Oscillator Circuit Examplementioning

confidence: 99%

“…A large part of the nonlinearity is determmed by the d1ffus10n capacitance part of Cn, which is current dependent. Since gm, can be varied over a large range, the tuning range can easily be made more than an octave [229,244], and can even span four decades [ 120].…”

Section: Ring Oscillatorsmentioning

confidence: 99%

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High-Frequency Oscillator Design for Integrated Transceivers

Tang¹

2005

The International Series in Engineering and Computer Science

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Section: Two-integrator Oscillator Circuit Examplementioning

confidence: 98%

Section: Classificationmentioning

confidence: 99%

Section: Two-integrator Oscillator Circuit Examplementioning

confidence: 99%

Section: Ring Oscillatorsmentioning

confidence: 99%

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High-Frequency Oscillator Design for Integrated Transceivers

Tang¹

2005

The International Series in Engineering and Computer Science

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“…For highly integrated low-power receiver front-end, a current reuse technique is typically chosen across different functional blocks. A popular method is stacking the mixer on top of the input stage of the low-noise amplifier (LNA), while less frequent one is stacking mixer and voltage-controlled oscillator (VCO) [1][2][3][4]. In [1], a double balanced mixer is stacked on top of the voltage-controlled oscillator (VCO) by using the current reuse topology.…”

Section: Introductionmentioning

confidence: 99%

A Single-Stage Low-Power Double-Balanced Mixer Merged with LNA and VCO

Oh¹

2017

IJECE

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This paper proposes three types of single stage low-power RF front-end, called double-balanced LMVs, by merging LNA, mixer, and voltagecontrolled oscillator (VCO) exploiting a series LC (SLC) network. The low intermediate frequency (IF) or baseband signal can be directly sensed at the drain nodes of the VCO switching transistors by adding a simple resistorcapacitor (RC) low-pass filter (LPF). By adopting a double-balanced mixer topology, the strong leakage of the local oscillator (LO) at the IF output is effectively suppressed. Using a 65 nm CMOS technology, the proposed double-balanced LMVs (DB-LMVs) are designed. Oscillating at around 2.4 GHz ISM band, the phase noise of the proposed three DB-LMVs is −111 dBc/Hz at 1 MHz offset frequency. The simulated voltage conversion gain is larger than 36 dB and the double-side band (DSB) noise figure (NF) is less than 7.7 dB. The DB-LMVs consume only 0.2 mW dc power from 1-V supply voltage.

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An inductorless CMOS quadrature oscillator continuously tuneable from 3.1 to 10.6 GHz

Oliveira

Snelling²,

Fernandes

et al. 2012

Circuit Theory & Apps

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SUMMARYModern RF front-ends require wide tuning-range oscillators with quadrature outputs. In this paper we present a two-integrator quadrature oscillator, which covers the whole bandwidth of UWB applications. A circuit prototype in a 130 nm CMOS technology is continuously tuneable from 3.1 to 10.6 GHz. The circuit die area is less than 0.013 mm 2 , leading to a figure-of-merit FOMA of −176.7dBc/Hz at the upper frequency. The supply voltage is 1.2 V, and the power consumption is 7 mW at the lower frequency and 13 mW at the upper frequency.

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A 0.9-2.2 GHz monolithic quadrature mixer oscillator for direct-conversion satellite receivers

Cited by 40 publications

References 4 publications

High-Frequency Oscillator Design for Integrated Transceivers

High-Frequency Oscillator Design for Integrated Transceivers

A Single-Stage Low-Power Double-Balanced Mixer Merged with LNA and VCO

An inductorless CMOS quadrature oscillator continuously tuneable from 3.1 to 10.6 GHz

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