A 0.9-V 100-&lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$\mu$ &lt;/tex-math&gt; &lt;/inline-formula&gt;W Feedforward Adder-Less Inverter-Based MASH &lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$\Delta\Sigma$ &lt;/tex-math&gt; &lt;/inline-formula&gt; Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth

Honarparvar, Mohammad; Rosa, José M. de la

doi:10.1109/tcsi.2018.2854220

Cited by 30 publications

(3 citation statements)

References 25 publications

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“…As can be observed, this structure has a lower area and power consumption when compared to the others. Table 3 compares the SDM with other works [27,28,29,30,31]. When considering area comparison, the structures with comparable performances have been selected.…”

Section: Experimental and Post-simulation Resultsmentioning

confidence: 99%

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A Sigma-Delta ADC for Signal Conditioning IC of Automotive Piezo-Resistive Pressure Sensors with over 80 dB SNR

Rikan

Kim

Ahmad

et al. 2018

Sensors

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This paper presents a second-order discrete-time Sigma-Delta (SD) Analog-to-Digital Converter (ADC) with over 80 dB Signal to Noise Ratio (SNR), which is applied in a signal conditioning IC for automotive piezo-resistive pressure sensors. To reduce the flicker noise of the structure, choppers are used in every stage of the high gain amplifiers. Besides, to reduce the required area and power, only the CIC filter structure is adopted as a decimation filter. This filter has a configurable structure that can be applied to different data rates and input signal bandwidths. The proposed ADC was fabricated and measured in a 0.18-µm CMOS process. Due to the application of only a CIC filter, the total active area of the SD-ADC and reference generator is 0.49 mm2 where the area of the decimation filter is only 0.075 mm2. For the input signal bandwidth of 1.22 kHz, it achieved over 80 dB SNR in a 2.5 MHz sampling frequency while consuming 646 µW power.

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Section: Experimental and Post-simulation Resultsmentioning

confidence: 99%

“…When considering area comparison, the structures with comparable performances have been selected. The area that is the concern of this work is much smaller than [27,29] and is comparable to [30,31], although the latter uses a 90 nm technology. The input noise density performance is also summarized in Table 2.…”

Section: Experimental and Post-simulation Resultsmentioning

confidence: 99%

A Sigma-Delta ADC for Signal Conditioning IC of Automotive Piezo-Resistive Pressure Sensors with over 80 dB SNR

Rikan

Kim

Ahmad

et al. 2018

Sensors

View full text Add to dashboard Cite

show abstract

“…The biggest drawback lies in the accuracy required for analog blocks, specifically the LNA and the RF-to-digital converter [64]. However, the use of suitable synthesis methodologies [125], combined with circuit-level optimization and RF/ASP circuit tuning strategies can reduce the power consumption to the order of a few mW [126] or even µW [131]. However, even though the tuning range can be increased, the specifications required for the ADC are still well beyond the state of the art.…”

Section: B σ∆M-based Receivers For Sdr/crmentioning

confidence: 99%

AI-Managed Cognitive Radio Digitizers

Rosa

2022

IEEE Circuits Syst. Mag.

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Embedding Artificial Intelligence (AI) in integrated circuits is one of the technology pillars of the so-called digital transformation. Nowadays, the vast majority of electronic devices benefits from digital signal processing to implement more and more functionalities, which can be further enhanced by the action of AI algorithms and artefacts. Moreover, as the analog/digital interfaces are moving closer and closer to the point where the information is either acquired or transmitted, the so-called AImanaged data converters are becoming key building blocks in an increasingly number of interconnected cyberphysical systems -made up of both software and hardware components. Software Defined Radio (SDR) and Cognitive Radio (CR) systems intended for 5G/6G communications are good examples which can benefit from an early digitization managed by AI engines.In this context, this paper presents an overview of circuits and systems techniques for AI-managed analog/digital interfaces with application in SDR/CR mobile telecom systems. Some design trends and challenges are discussed, going from new communications and computing paradigms for AIoT devices and networks, to digital-based/scaling-friendly analog circuit techniques for an efficient digitization. The state of the art on Analogto-Digital Converters (ADCs) is surveyed, putting emphasis on highly-programmable Sigma-Delta Modulators (Σ∆Ms) as one of the best ADC candidates for SDR/CR transceivers. Some chip examples are shown to illustrate their potential application in AI-enhanced CR end-devices.

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