A 0.9-V supply, 16.2 nW, fully MOSFET resistorless bandgap reference using sub-threshold operation

Fakharyan, Iman; Ehsanian, Mehdi; Hayati, Hadi

doi:10.1007/s10470-019-01521-y

Cited by 13 publications

(9 citation statements)

References 8 publications

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“…Figure 11c Table 2 summarizes the proposed voltage reference characteristics compared with other similar works. Gate-Source voltage of an nMOS biased in the sub-threshold region is utilized as a CTAT voltage in [5] and [7],…”

Section: Simulation Resultsmentioning

confidence: 99%

“…Based on the voltage difference of two nMOS transistors, a self-cascode PTAT voltage is generated and combined with CTAT voltage while the presented nano-Watt BGR is still applying BJT and resistors [6]. A MOS-only nano-Watt BGR presented in [7] uses three self-cascode PTAT stages while VTH is applied as the CTAT voltage. However, It is more sensitive to process variation because of VTH variation.…”

Section: Introductionmentioning

confidence: 99%

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MOS only nano-watt sub-bandgap voltage reference

Rashtian

2023

Analog Integr Circ Sig Process

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This paper presents a nano-watt bandgap voltage reference (BGR). The self-cascode structure is provided as a proportional-toabsolute-temperature (PTAT) voltage. Due to the low slope of the PTAT voltage, a voltage divider consisting of five similar MOSFET transistors is presented. The resulting output voltage will be one-fifth of the complementary-to-absolute-temperature (CTAT) voltage and four-fifths of the PTAT voltage. All MOSFETs are standard CMOS transistors biased in the sub-threshold region where one of them is utilized as a diode.Post-layout simulation results using the standard 0.18 µm CMOS process show a nominal output voltage of 0.132 V. The power consumption is 12.7 nW at 0.7 V of the power supply. The average temperature coefficient (TC) is about 28.5 ppm/ o C over a temperature range of 0 o C to 100 o C. The proposed BGR occupies a small area of 0.00067 mm 2 .

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Section: Simulation Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

MOS only nano-watt sub-bandgap voltage reference

Rashtian

2023

Analog Integr Circ Sig Process

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“…Figure 4 shows the static comparator. The left part is a nanoamp CMOS current bias circuit [10] that provides a very low operating current for the comparator. The MP9 is equivalent to a diode, equivalent to two diodes connected in parallel, drain-substrate, and source-substrate, respectively, where the source and drain are used as the anode and the substrate the cathode.…”

Section: Comparatormentioning

confidence: 99%

A Low-power Level-Crossing ADC for Biosignal Acquisition

Lin

Chen

2023

J. Phys.: Conf. Ser.

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A large number of redundant signals will be generated when the traditional Nyquist sampling method is used to acquire a biological signal, leading to a system’s energy loss. A new level-crossing analog-to-digital converter (LC-ADC) with non-uniform sampling and fixed window structure is presented, with fewer data and low power consumption features. The circuit uses a 6-bit capacitive DAC to quantize the input signal, avoiding the error accumulation of the 1-bit capacitive DAC structure, and a nanoamp CMOS current bias circuit to provide a very low quiescent current for the comparator, further reducing power consumption. The structure was verified in a 0.18μm CMOS technology. The results indicate that the total power dissipation is 0.26uw@500Hz, the signal-to-noise distortion ratio (SNDR) is 59dB@500Hz, and ENOB reached 9.51bit, which is suitable for the acquisition of low-frequency biological signals.

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“…Figure 3 represents a three-stacked PTAT voltage generation circuit. 20 The voltages V PTAT 1 , V PTAT 2 , and V PTAT 3 can be calculated by…”

Section: Stacked Ptat Voltage Generationmentioning

confidence: 99%

MOSFET only low power sub‐bandgap voltage reference by subtraction of slope compensated proportional‐to‐absolute‐temperature voltage references

Thomas Abraham,

K.J.

2023

Circuit Theory & Apps

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SummaryVoltage references are typically designed by combining a complimentary to absolute temperature (CTAT) and proportional to absolute temperature (PTAT) voltage references. However, in contrast to conventional voltage references, the proposed circuit generates a voltage reference by subtracting two PTAT voltages, resulting in an extremely low process‐dependent voltage reference. A novel subtractor is also proposed for subtracting PTAT voltages, which is used to generate the reference voltage. The temperature coefficient of the proposed voltage reference is further improved using a novel PTAT slope compensation technique. The proposed voltage reference is a MOS‐only ultra‐low power circuit that works with sub‐bandgap supply voltage. Simulation results using UMC 0.18 m technology MOSFETs show that the proposed circuit has a line sensitivity of 0.5%/V, a temperature coefficient of 21.37 ppm/° C, a power consumption of 15.6 nW, and an output voltage variation of only 0.22% due to process variations.

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A 0.9-V supply, 16.2 nW, fully MOSFET resistorless bandgap reference using sub-threshold operation

Cited by 13 publications

References 8 publications

MOS only nano-watt sub-bandgap voltage reference

MOS only nano-watt sub-bandgap voltage reference

A Low-power Level-Crossing ADC for Biosignal Acquisition

MOSFET only low power sub‐bandgap voltage reference by subtraction of slope compensated proportional‐to‐absolute‐temperature voltage references

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