A 1–11 GHz ultra‐wideband LNA using M‐derived inductive peaking circuit in UMC 65 nm CMOS

Abstract

A high‐gain, low‐power, and low‐noise amplifier (LNA) is designed in UMC 65 nm radio frequency (RF)‐CMOS technology for operation over the 1 to 11 GHz RF band. This LNA design is based on an m‐derived inductive peaking circuit with a shunt feedback inverter. The m‐derived inductive peaking circuit is placed between two shunt feedback inverters. Further, a split inductor topology is introduced in the circuit. The procedure for the integrating of an m‐derived inductive peaking circuit in LNA is explained in detail. The proposed circuit achieves more than 14 dB of power gain over an ultra‐wideband of 1 to 11 GHz. The measurement of the proposed LNA achieves a minimum of 2.5 dB of noise figure, and more than −8 dBm of third‐order input intercept point, while consuming 11.3 mW of power. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:521–526, 2017

Active feedback supported CMOS LNA blended with coplanar waveguide‐fed antenna for Wi‐Fi networks

“…In [5], a special technique of parallel push–pull design using CMOS circuit is devised to adhere high noise cancellation and high linearity at the cost of high power consumption of 20.8 mW and low voltage gain of 13 dB in the frequency spectrum of 0.1 to 1.6 GHz. The inductive gain peaking technique popularly adopted choice for noise cancelling and gain flattening, offers the limitation of narrow bandwidth and use of inductor [6]. The other scheme that enhances gain performance with wide band, used a negative capacitance that mitigates the effect of parasitic capacitances [7].…”

Analysis and optimization of a resistive‐feedback inverter LNA

“…The inverter‐structure amplifier is widely used in digital and analog amplifiers for high gain and low power consumption in the CMOS process . It consists of NMOS and PMOS transistors with a back‐to‐back drain and a combined gate.…”

“…Most inverter‐structure low‐noise amplifiers (LNAs) have been designed to have a large PMOS . This tendency has been conventionally extended to the design of the resistive‐feedback inverter‐structure LNA to achieve self‐biasing and wide bandwidth . In, the size ratio of the PMOS to the NMOS was 2:1, which follows the conventional rule of the inverter.…”

“…This tendency has been conventionally extended to the design of the resistive‐feedback inverter‐structure LNA to achieve self‐biasing and wide bandwidth . In, the size ratio of the PMOS to the NMOS was 2:1, which follows the conventional rule of the inverter. In, the size ratio was ambiguously 1:1.…”

“…The inverter-structure amplifier is widely used in digital and analog amplifiers for high gain and low power consumption in the CMOS process. [1][2][3][4][5] It consists of NMOS and PMOS transistors with a back-to-back drain and a combined gate. Conventionally, the PMOS has been designed to be two or three times larger than the NMOS due to their mobility difference.…”