A 1.16-V 5.8-to-13.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference Circuit With a Shared Offset-Cancellation Method for Internal Amplifiers

Chen, Keng; Petruzzi, Luca; Hulfachor, R.B.; Onabajo, Marvin

doi:10.1109/jssc.2020.3033467

Cited by 77 publications

(22 citation statements)

References 29 publications

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“…Among them are the quadratic temperature compensation [9], exponential temperature compensation [10], piecewise-linear curvature correction [11], [12], [15], [16], [17], [18], [19], [20] and resistor temperature compensation [13], [14]. The continuous-time feedback technique is employed in [15] to reduce noise and offset.…”

Section: Introductionmentioning

confidence: 99%

Low Noise, High PSRR, High-Order Piecewise Curvature Compensated CMOS Bandgap Reference

Colombo

Yin

et al. 2022

IEEE Access

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A Bandgap reference (BGR) circuit with a new high-order curvature-compensation technique is proposed in this paper. The curvature method operates by adding up two correction voltages. The first one is proportional to the difference in gate-source voltages of two MOS transistors ( V GS ) operating in weak inversion mode, while the second one (V NL ) is generated using a nonlinear current created by a piecewiselinear circuit. To improve the power supply rejection ratio (PSRR) and the line regulation performance, a lowpower pre-regulator isolates the circuit power supply and BGR output. Additionally, the chopping technique reduces the output voltage noise and offset. Consequently, the overall PVT robustness of the proposed circuit is significantly improved. The circuit was implemented using a thick-oxide transistor in a standard 0.18 µm CMOS technology with a 3.3 V power supply voltage. The silicon results exhibit a temperature coefficient of 5-15 ppm/ • C in the temperature range of −10 • C to 110 • C, whereas the simulated results demonstrate a similar performance within the temperature range of −40 • C to 150 • C. The supply current consumption is 150 µA, and the chip area is 0.56 × 0.8 mm 2 . The measured peak noise at the output is 1.42 µV/ √ Hz @320 Hz, the measured PSRR @ 1 kHz is −80 dB, and the line regulation performance is 10 ppm/V, making the proposed circuit suitable for applications requiring low noise, high-order temperature compensation, and robust PVT performance.INDEX TERMS Pre-regulator, BGR, curvature compensation, low-power operation, low area, subthreshold, temperature coefficient.

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Section: Introductionmentioning

confidence: 99%

Low Noise, High PSRR, High-Order Piecewise Curvature Compensated CMOS Bandgap Reference

Colombo

Yin

et al. 2022

IEEE Access

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“…In most DC-DC converters, to regulate to a required voltage level such as 1.2, 1.8, 2.5 and 3.3 V, a reference circuit independent of power supply and temperature is needed [1][2][3][4][5][6][7]. Most reference voltage circuits output a fixed voltage, and can only meet the needs of different voltages through off-chip voltage divider resistors.…”

Section: Introductionmentioning

confidence: 99%

“…Meanwhile, the temperature coefficient (TC) was not good for using non-bandgap CMOS voltage reference. Compared to the CMOS voltage reference, bandgap reference (BGR) can achieve the performance of low TC with some relatively complex temperature compensation methods [2][3][4]. In fact, the voltage offset effect of the operational amplifier and the effect of the base current are two common bottlenecks designing a high-performance BGR [4,5].…”

Section: Introductionmentioning

confidence: 99%

“…Compared to the CMOS voltage reference, bandgap reference (BGR) can achieve the performance of low TC with some relatively complex temperature compensation methods [2][3][4]. In fact, the voltage offset effect of the operational amplifier and the effect of the base current are two common bottlenecks designing a high-performance BGR [4,5]. In this paper, an improved BGR with base current compensation to solve the problem of offset effect is proposed to generate low TC and configurable output voltages of 1.2/1.8/2.5/3.3 V.…”

Section: Introductionmentioning

confidence: 99%

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A high accuracy and configurable voltage (1.2/1.8/2.5/3.3 V) bandgap reference with base current compensation for DC–DC converters

Zhou

Wang

Hao

2022

Electronics Letters

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Presented is an improved bandgap reference (BGR), which has the performance of high accuracy and can generate the required voltage reference. In this BGR, the improved base current compensation is proposed to eliminate the effect of the base current. Meanwhile, a high reference voltage generator is used to provide configurable output voltages of 1.2/1.8/2.5/3.3 V needed by DC-DC converters. The BGR is realized in a standard 180-nm Complementary Metal Oxide Semiconductor (CMOS) process with an area of 0.05 mm × mm. Among the five sample chips of the reference, in the temperature range of −40°C to 125°C, the temperature coefficients (TCs) of all the reference voltages range from 3 to 38 ppm/°C. The best average value of TCs is 6.03 ppm/°C when the reference voltage is 2.5 V. The best line sensitivities (LS) are 0.23%/V when the reference voltage is 1.8 V with the power consumption of 150μW, when the supply voltage (VDD) is =5 V.

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“…The biasing circuit and variation in the power supply also contribute to the noise. Hence, a clock generator requires a low-noise voltage regulator with a high PSRR to suppress supply and unwanted bias circuitry noise [20][21][22][23][24][25].…”

Section: Introductionmentioning

confidence: 99%

A Chopper-Embedded BGR Composite Noise Reduction Circuit for Clock Generator

Agarwal

Oh‐e

2021

Electronics

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A chopper-embedded bandgap reference (BGR) scheme is presented using 0.18 μm CMOS technology for low-frequency noise suppression in the clock generator application. As biasing circuitry produce significant flicker noise, along with thermal noise from passive components, the proposed low-noise chopper-stabilized BGR circuit was designed and implemented for wide temperature range of −40 to 125 °C, including a startup and self-biasing circuit to reduce critical low-frequency noise from the bias circuitry and op amp input offset voltage. The BGR circuit generated a reference voltage of 1.25 V for a supply voltage range of 2.5–3.3 V. The gain of the implemented BGR operational transconductance amplifier is 84.1 dB. A non-overlapping clock circuit was implemented to reduce the clock skew effect, which is also one of the noise contributors. The noise analysis of a chopped bandgap voltage reference was evaluated through cadence periodic steady-state (PSS) analysis and periodic noise (PNoise) analysis. The low-frequency flicker noise was reduced from 1.5 to 0.4 μV/sqrt(Hz) at 1 KHz, with the proposed chopping scheme in the bandgap. Comparisons of the noise performance of the chopper-embedded BGR, with and without a low-pass filter, were also performed, and the results show a further reduction in the overall noise. A reduction in the flicker noise, from 181.3 to 10.26 mV/sqrt(Hz) at 100 KHz, was observed with the filter. All circuit blocks of the proposed BGR scheme were designed and simulated using the EDA tool HSPICE, and layout generation was carried out by Laker. The BGR architecture layout dimensions are 285.25 μm × 125.38 μm.

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A 1.16-V 5.8-to-13.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference Circuit With a Shared Offset-Cancellation Method for Internal Amplifiers

Cited by 77 publications

References 29 publications

Low Noise, High PSRR, High-Order Piecewise Curvature Compensated CMOS Bandgap Reference

Low Noise, High PSRR, High-Order Piecewise Curvature Compensated CMOS Bandgap Reference

A high accuracy and configurable voltage (1.2/1.8/2.5/3.3 V) bandgap reference with base current compensation for DC–DC converters

A Chopper-Embedded BGR Composite Noise Reduction Circuit for Clock Generator

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