A 1.2-V, 84-dB ΣΔ ADM in 0.18-μm digital CMOS technology

Abstract

A low power and low voltage † analog-to-digital modulator is realized with digital CMOS technology, which is due to full compensated depletion mode capacitors. Compared with mixed signal technology, this type of modulator is more compatible for pure digital applications. A pseudo-two-stage class-AB OTA is used in switchedcapacitor integrators for low voltage and low power. The modulator is realized in standard SMIC 0.18 m 1P6M digital CMOS technology. Measured results show that with 1.2 V supply voltage and a 6 MHz sample clock, the dynamic range of the modulator is 84 dB and the total power dissipation is 2460 W.