A 1.5–1.9-GHz All-Digital Tri-Phasing Transmitter With an Integrated Multilevel Class-D Power Amplifier Achieving 100-MHz RF Bandwidth

Abstract

We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with noncontiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5% error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6% PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.

A Class-D Tri-Phasing CMOS Power Amplifier With an Extended Marchand-Balun Power Combiner

“…All measurements presented in this section were conducted using the on-chip phase modulators [10] to generate the PA input signals. The 1.0-V supply domain is shared with the modulators, which dominate the power consumption in that domain.…”

“…which is equal between tri-phasing and multilevel outphasing at any value of P out . The PA was implemented in 28-nm CMOS as an integrated part of the tri-phasing transmitter presented in [10]. Fig.…”

“…In future work, this ringing could be suppressed for example with damping legs [36]. Phase-modulator nonidealities are another source of noise near the signal band [10]. In PA simulations of a 20-MHz LTE signal without the aforementioned effects, tri-phasing improves the ACLR by 3.0 dB and reduces the noise at a 40-MHz offset from the signal band (ACLR2) by 9.1 dB compared to multilevel outphasing.…”

“…In this paper, we present a tri-phasing PA consisting of eight PA units on a single 28-nm CMOS die and a coupledline power combiner on the printed circuit board (PCB). We place particular emphasis on the analysis and design of the power combiner, which has only been superficially described by our previous papers focusing on the integratedcircuit (IC) design details of the PA [9] and the complete transmitter included on the same die [10]. The combiner is an essential part of the system, largely defining the available carrier-frequency range and many characteristics of the wide spectrum.…”

A 1.5–5-GHz Integrated RF Transmitter Front End for Active Matching of an Antenna Cluster

“…The delay line has two characteristics: the delay step that is the smallest possible time step and the delay range (DR) corresponding to the maximum time a signal can be delayed. In this prototype, the delay characteristics for each antenna feed is implemented with a phase tuning block that pours down to a tapped delay line and a multiplexer, similar to one used in [36].…”