A 10-bit 33.3-kS/s 3.2-fJ/conversion-step single-ended counter-type SAR ADC with dual 5-bit CDAC arrays and counters in 65-nm CMOS

Tehranian, Armin; Peiravi, Ali

doi:10.1016/j.aeue.2023.155066

AEU - International Journal of Electronics and Communications

2024

DOI: 10.1016/j.aeue.2023.155066

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A 10-bit 33.3-kS/s 3.2-fJ/conversion-step single-ended counter-type SAR ADC with dual 5-bit CDAC arrays and counters in 65-nm CMOS

Armin Tehranian,

Ali Peiravi

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A 0.7-V 9-bit 2-MS/s SAR ADC with a novel energy-efficient switching methodology in 40-nm CMOS

Huang,

2024

2024 IEEE 4th International Conference on Electronic Technology, Communication and Information (ICETCI)

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A 0.7-V 9-bit 2-MS/s SAR ADC with a novel energy-efficient switching methodology in 40-nm CMOS

Huang,

2024

2024 IEEE 4th International Conference on Electronic Technology, Communication and Information (ICETCI)

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A 10-bit 33.3-kS/s 3.2-fJ/conversion-step single-ended counter-type SAR ADC with dual 5-bit CDAC arrays and counters in 65-nm CMOS

Cited by 1 publication

References 24 publications

A 0.7-V 9-bit 2-MS/s SAR ADC with a novel energy-efficient switching methodology in 40-nm CMOS

A 0.7-V 9-bit 2-MS/s SAR ADC with a novel energy-efficient switching methodology in 40-nm CMOS

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