A 10 nm MOSFET concept

Junctionless field-effect transistors (JL-FETs) with a 3 nm channel length are fabricated on silicon-on-insulator (SOI) substrates using simple process techniques. The anisotropic etching of Si crystals by alkaline solution is utilized to form V-grooves and to define nanometer-scale channel structures. Ultrathin channels created on the SOI have a 3 nm channel length that is determined by the edge of V-grooves. Dopants are introduced by ion implantation at the source and drain regions and diffused into the channel region at a high temperature and by long-period annealing. V-groove JL-FETs thus fabricated show superior performances by scaling the thickness of the SOI channel toward 1 nm and less. Through the measurement of many V-groove JL-FETs and a simulation study, it is clarified that the management of channel thickness with atomic-scale precision is indispensable for sub-10 nm FETs.

Section: Methodsmentioning

confidence: 90%

Section: Introductionmentioning

confidence: 99%

Fabrication and Demonstration of 3-nm-Channel-Length Junctionless Field-Effect Transistors on Silicon-on-Insulator Substrates Using Anisotropic Wet Etching and Lateral Diffusion of Dopants

Migita

Morita

Masahara

et al. 2013

“…The device used was a V-grooved FET. FETs with nanoscale channel lengths are manufactured by various methods, [19][20][21][22] and it is difficult to evaluate the physical properties using precisely nano-controlled devices based on their size. The V-grooved FET is a transistor obtained by anisotropic wet etching of a silicon-on-insulator (SOI) substrate to the V-groove.…”

Section: Introductionmentioning

confidence: 99%

One-dimensional array of gold nanoparticles fabricated using biotemplate and its application to fine FET

Ban

Uenuma

Migita

et al. 2018

By synthesizing AuS nanoparticles (NPs) with spherical shell protein (ferritin) and using a V-groove, a one-dimensional array of NPs was formed at the bottom of the V-groove. It has been reported that AuS NPs are converted to Au NPs by UV/ozone treatment. Floating gate memory (FGM) was fabricated by applying this one-dimensional array to V-grooved junctionless (JL) FETs, V-grooved nin-like-type FETs, and pip-like-type FETs, which are fine FETs. In JL-FETs, it is considered that conversion occurred because of good charge storage efficiency, and operation in the opposite direction to normal FGM operation was seen. In the nin-like and pip-like types devices, the same operation as in conventional FGM was shown, and the width of the memory window was about the same size as when one electron entered one NP. The one-dimensional arrangement of the metal NPs used in this study is considered to be applicable to various fields of nanotechnology.

“…11,12) Therefore, researchers of nanoelectronics are making great efforts to examine the electrical characteristics of 10 nm and smaller devices. [13][14][15] These researchers are utilizing various high-performance technologies to assemble 10 nm and smaller devices, but it is still difficult to examine physical characteristics by fabricating carefully controlled nanostructures. To solve this problem, a V-groove-type FET produced by a simple process is being proposed.…”

Section: Introductionmentioning

confidence: 99%

Ultrashort intrinsic-like channel FETs with nanodot-type floating gate utilizing biomaterial

Ban¹,

Migita²,

Uenuma³

et al. 2018

We investigated the electrical characteristics of an n–i–n-type FET of a sub-10 nm channel with nanoparticles (NPs). To fabricate the FET, a V-groove was formed in a silicon-on-insulator substrate by anisotropic wet etching. Cage-shaped proteins (ferritin) was used for the formation and placement of NPs. A solution of ferritin containing a metal oxide core was dropped onto the substrate, and spin drying was performed to arrange the NPs at the bottom of the V-groove. NPs served as a floating gate for this device. Threshold voltage (Vth) shift was confirmed as a memory operation in devices with NPs. The Vth shift was clearly observed in different types of NPs. The Vth shift was controlled along the channel length direction by a single nanodot floating gate.