A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets

Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors

“…Moreover, integration density of SRAMs is constantly increasing and node spacing is becoming much smaller. Hence, one striking-particle may simultaneously affect two OFF-state transistors in a storage element due to multiple node charge collection mechanisms [4], causing a double-node upset (DNU). Indeed, SNUs and DNUs can cause invalid value-retention in a SRAM cell.…”

“…To mitigate SNUs or even DNUs, many designs of SRAM cells [4,[6][7][8][9][10][11][12][13][14][15] have been proposed by using the Radiation Hardening By Design (RHBD) approach. RHBD, which is also used for designing latches [16][17] and flip-flops [18][19][20], can effectively mitigate the impact of radiation particles on SRAM cells.…”

“…Since the 6T cell cannot tolerate SNUs, many hardened SRAM cells have been proposed for reliability improvement. Typical SNU hardened cells include ST10T [4], NASA13T [6], RHD12T [7], NS10T [8] and RSP14T [9]. Typical DNU hardened cells include RH12T [10] and DNUSRM [11].…”

“…(1) Some SRAM cells cannot self-recover from any SNU, such as ST10T [4] and NASA13T [6]. Some SRAM cells can self-recover from SNUs only for a part of internal nodes, such as RHD12T [7], NS10T [8] and RSP14T [9].…”

“…Some SRAM cells can self-recover from SNUs only for a part of internal nodes, such as RHD12T [7], NS10T [8] and RSP14T [9]. Meanwhile, some SRAM cells cannot self-recover from any DNU, such as ST10T [4] and NASA13T [6], and some SRAM cells can self-recover from DNUs only for a part of node pairs, such as RHD12T [7], NS10T [8], RSP14T [9] and RH12T [10].…”