A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications

Toyoda, Hidehiro; Nishimura, Satoshi; Okuno, Michitaka; Terada, Matsuaki

doi:10.1093/ietele/e90-c.10.1957

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A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications

Cited by 4 publications

References 5 publications

A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet

A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet

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Challenging Terabit-Class LAN Over Wide Area Networks

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