A 103 fJ/b/dB, 10-26 Gbps Receiver with a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement

Liu, Yao-Chia; Chen, Wei-Zen; Lee, Yuan‐Sheng; Chen, Yu-Hsiang; Min, Shawn; Lin, Ying-Hsi

doi:10.1109/a-sscc56115.2022.9980721

2022 IEEE Asian Solid-State Circuits Conference (A-Sscc) 2022

DOI: 10.1109/a-sscc56115.2022.9980721

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A 103 fJ/b/dB, 10-26 Gbps Receiver with a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement

Yao-Chia Liu

Wei-Zen Chen

Yuan‐Sheng Lee

et al.

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A 103 fJ/b/dB, 10-26 Gbps Receiver with a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement

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