A 128K EPROM with redundancy

Spaw, William; Folmsbee, A.; Canepa, G.

doi:10.1109/isscc.1982.1156400

Search citation statements

Order By: Relevance

Paper Sections

Select...

Area Overhead1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

1982

2001

Publication Types

Select...

Article3

Other2

Relationship

Self Cite0

Independent5

Authors

Journals

Cited by 8 publications

(1 citation statement)

References 1 publication

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Note that the redundant rows are not considered as overhead since redundancy is used in a vast majority of large RAMs (and in some cases, ROMs) even if there is no self-repair. In case there is no self-repair, the following techniques are commonly used for reconfiguration of RAMs and ROMs: a) electrically-programmable redundant elements [12] and b) laser-blown polysilicon or diffusion fuses [1], [7], [14], and c) electrically-blown programmable polysilicon fuses [6], [15], [20]. These techniques are difficult and/or too expensive to use for embedded memories.…”

Section: Area Overheadmentioning

confidence: 99%

A physical design tool for built-in self-repairable RAMs

Chakraborty

Kulkami

Bhattacharya

et al. 2001

IEEE Trans. VLSI Syst.

View full text Add to dashboard Cite

Abstract-In this paper, we present the description and evaluation of a novel physical design tool, BISRAMGEN, that can generate reconfigurable and fault-tolerant RAM modules. This tool, first proposed in [3], designs a redundant RAM array with accompanying built-in self-test (BIST) and built-in self-repair (BISR) logic that can switch out faulty rows and switch in spare rows. Built-in self-repair causes significant improvement in reliability, production yield, and manufacturing cost of ASICs and microprocessors with embedded RAMs.

show abstract