2021 IEEE International Symposium on Circuits and Systems (ISCAS) 2021
DOI: 10.1109/iscas51556.2021.9401219
|View full text |Cite
|
Sign up to set email alerts
|

A 14GHz Cascade Differential-Capacitor-Based DCO with Resistor-Biased Buffer

Abstract: A 14GHz digitally controlled oscillator (DCO) is proposed for all-digital phase-locked loop (ADPLL). With a cascade differential-capacitor array, the resolution of DCO is enhanced, which leads to a decrease in quantization noise, while area cost and substrate noise are also significantly reduced. In addition, a resistor-biased DCO output buffer is used to cut down phase noise by eliminating flicker and thermal noise conventional current-mirror structure brings. The proposed DCO is designed in 14nm FinFET proce… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
2

Citation Types

0
5
0

Year Published

2022
2022
2023
2023

Publication Types

Select...
2
1

Relationship

0
3

Authors

Journals

citations
Cited by 3 publications
(5 citation statements)
references
References 6 publications
0
5
0
Order By: Relevance
“…This means that the proposed structure can reduce the SC resolution ΔC by a factor of 2 12 , which greatly improves the tuning accuracy.…”
Section: Fine-tuned Cascaded Differential Sc Arraymentioning
confidence: 96%
See 4 more Smart Citations
“…This means that the proposed structure can reduce the SC resolution ΔC by a factor of 2 12 , which greatly improves the tuning accuracy.…”
Section: Fine-tuned Cascaded Differential Sc Arraymentioning
confidence: 96%
“…Figure 1A shows the first stage of the cascaded differential SC array proposed in Yanchi et al 12 Each stage consists of two Cs, two CP/4, and 15 SC units. Cs and CP are capacitors connected in series and parallel in the SC units, respectively.…”
Section: Proposed Cascaded Differential Sc Array and Eight‐shaped Tra...mentioning
confidence: 99%
See 3 more Smart Citations