A 16b 12GS/S single/dual-rate DAC with successive bandpass delta-sigma modulator achieving &lt;-67dBc IM3 within DC-to-6GHz tunable passbands

Su, Stephen Y. H.; Chen, Mike Shuo-Wei

doi:10.1109/isscc.2018.8310334

Cited by 11 publications

(4 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…This is due to a slight decrease in the output impedance of the unit current source after adopting isolation devices. At the Nyquist frequency, the SFDR is superior to work [9] and is close to work [20,24]. Comparing with work [10], the scheme presented in this paper is not dependent on segmentation, making it significantly easier to design.…”

Section: Measurement Resultsmentioning

confidence: 91%

Modeling and Mitigating Output-Dependent Modulation in Current-Steering DAC Based on Differential-Quad Switching Scheme

Sun,

Zhang,

Shan

et al. 2024

Electronics

View full text Add to dashboard Cite

This brief presents a comprehensive analysis of the output-dependent modulation (ODM) in a current-steering digital-to-analog converter (CS-DAC) based on the differential-quad switching (DQS) structure. A mathematical model is proposed to accurately describe ODM, which is categorized into two types: output transition errors and boundary effect errors. A novel approach of adding isolation devices is introduced and reinterpreted to mitigate the effect of ODM. The simulation results indicate that the inclusion of isolation devices efficiently suppresses the odd harmonics at mid-to-high frequency by a value that is 13 dB lower than before. Experimental validation is conducted on a 16-bit 250 MS/s CS-DAC fabricated in a 180 nm process.

show abstract

Section: Measurement Resultsmentioning

confidence: 91%

Modeling and Mitigating Output-Dependent Modulation in Current-Steering DAC Based on Differential-Quad Switching Scheme

Sun,

Zhang,

Shan

et al. 2024

Electronics

View full text Add to dashboard Cite

show abstract

“…The measured data report a higher energy consumption in comparison with the linearity energy bound, where it is observed how the measured data follows the bound trend as the requirement in the SFDR increases. Both [40] and [41] incorporate signal processing, in turn, increasing the overall power consumption as observed between the measured data and the linearity bound when operating with a channel bandwidth of f s =2.…”

Section: Verification With Measurement Resultsmentioning

confidence: 99%

Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters

Chacon

Wikner

Svensson

et al. 2022

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

In this paper, an attempt to estimate energy consumption bounds versus signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) in CMOS current-steering digital-to-analog converters is presented. A theoretical analysis is derived, including the design corners for noise, speed and linearity for the mixed-signal domain. The study is validated by comparing the theoretical results with published measured data. As result it serves as a design reference to aim for minimum energy consumption. It is found that for an equivalent number of bits (ENOBs), the noise-bound grows at a rate of 22ENOB, whereas the speed-bound increases by 2ENOB−2 and is dependent on device dimensions. Therefore, as the technology scales down, the noise bound will dominate, which is observed for an estimated SNR of about 40 dB in 65 nm CMOS process. The linearity bound is derived from an analysis based on the assumption of limited output impedance, where it is found to be dependent on the device dimensions and increase at a rate of 2ENOB−1. The observations show that it is possible to achieve less energy consumption in all the design corners for different SNR and SFDR specifications within the Nyquist frequency, fs/2.

show abstract

“…Over the past decade, mostly digital architectures [7], [16], [13], [14] have been widely explored in AMS circuit and system design to maximally leverage the increasing digital signal processing capability in advanced technology nodes. With more digital or digital-like (time-domain) operations, circuits and systems become more flexible and more compatible with supply scaling, which continuously reduces the headroom of conventional AMS designs.…”

Section: Delta-sigma Dacmentioning

confidence: 99%

Cepa

Zhang

Liu

et al. 2020

Proceedings of the 39th International Conference on Computer-Aided Design

Self Cite

View full text Add to dashboard Cite

A 16b 12GS/S single/dual-rate DAC with successive bandpass delta-sigma modulator achieving <-67dBc IM3 within DC-to-6GHz tunable passbands

Cited by 11 publications

References 2 publications

Modeling and Mitigating Output-Dependent Modulation in Current-Steering DAC Based on Differential-Quad Switching Scheme

Modeling and Mitigating Output-Dependent Modulation in Current-Steering DAC Based on Differential-Quad Switching Scheme

Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters

Cepa

Contact Info

Product

Resources

About